https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116445
--- Comment #1 from Saurabh Jha ---
I am picking this up. I am having trouble assigning myself so commenting here
for now.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934
--- Comment #3 from Saurabh Jha ---
Submitted a patch for review.
https://gcc.gnu.org/pipermail/gcc-patches/2024-October/664477.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116934
--- Comment #2 from Saurabh Jha ---
I will take a look. Thanks for bisecting it.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111478
--- Comment #8 from Saurabh Jha ---
Hi Richard,
Are you also planning to backport it to gcc-12?
Regards,
Saurabh
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337
--- Comment #15 from Saurabh Jha ---
Have a patch for review here:
https://gcc.gnu.org/pipermail/gcc-patches/2024-January/644454.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337
--- Comment #14 from Saurabh Jha ---
I will look into this.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110221
Saurabh Jha changed:
What|Removed |Added
CC||saurabh.jha at arm dot com
--- Comment #5
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337
--- Comment #10 from Saurabh Jha ---
Hey,
This ICE uncovered something in Arm MVE. We proposed a fix in this patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635789.html
Regards,
Saurabh
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337
--- Comment #5 from Saurabh Jha ---
Hey,
I did some digging into it. The ICE is happening on this assert:
gcc_assert (REG_P (op))
Here the op->code is MEM while it was expecting a REG. For the test program
above, the function arm_effective_re