[Bug target/82106] [RISCV] Misaligned loads generated when doubles are split between stack and registers

2017-09-05 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82106 --- Comment #4 from Palmer Dabbelt --- Ya, sorry, I misread the assembly.

[Bug target/82106] [RISCV] Misaligned loads generated when doubles are split between stack and registers

2017-09-05 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82106 --- Comment #1 from Palmer Dabbelt --- Ugh. I'd really like to call this a bug and fix it, but since it'll technically break the ABI it'll require some more thought. Does "-mstrict-align" change the behavior? That would be a good argument to f

[Bug target/79912] [7/8 regression] LRA unable to generate reloads after r245655

2017-08-15 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912 Palmer Dabbelt changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug tree-optimization/80153] ivopt generate wrong code

2017-03-22 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80153 --- Comment #3 from Palmer Dabbelt --- Thanks for looking at this. If there's anything I can do to help feel free to ask, but from my understand this isn't a RISC-V backend problem so I'm not going to put this on my TODO list unless something ch

[Bug target/79912] [7 regression] LRA unable to generate reloads after r245655

2017-03-17 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912 --- Comment #17 from Palmer Dabbelt --- I'm sending out the immediate fix, I'll try and get some time to clean up the mov patterns this weekend. https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00960.html

[Bug target/79912] [7 regression] LRA unable to generate reloads after r245655

2017-03-13 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912 --- Comment #15 from Palmer Dabbelt --- Created attachment 40968 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40968&action=edit glibc file that loops The suggested patch causes an infinate loop while building glibc for RISC-V. The prepr

[Bug target/79912] [7 regression] LRA unable to generate reloads after r245655

2017-03-07 Thread palmer at dabbelt dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79912 Palmer Dabbelt changed: What|Removed |Added CC||palmer at dabbelt dot com --- Comment