https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117017
--- Comment #1 from mike.robins at talktalk dot net ---
Created attachment 59297
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59297&action=edit
Generated assembler code.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117017
Bug ID: 117017
Summary: ARM code generation for sequentially consistent load
generates too many dmb instructions
Product: gcc
Version: 12.2.0
Status: UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99937
--- Comment #4 from mike.robins at talktalk dot net ---
(In reply to Richard Biener from comment #3)
> (In reply to mike.robins from comment #2)
> > (In reply to Richard Biener from comment #1)
> > > You need to adjust RTX costing accordingly whic
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99937
--- Comment #2 from mike.robins at talktalk dot net ---
(In reply to Richard Biener from comment #1)
> You need to adjust RTX costing accordingly which likely means adding a new
> subtarget tuning.
Hi Richard
Are you saying that this would have t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99937
Bug ID: 99937
Summary: Optimization needed for ARM with single cycle
multiplier
Product: gcc
Version: 10.2.0
Status: UNCONFIRMED
Severity: normal
Prio
