[Bug middle-end/112824] Stack spills and vector splitting with vector builtins

2025-06-05 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112824 Hongtao Liu changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/71453] Spills to vector registers are sub-optimal.

2025-06-05 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
||7.1.0 Resolution|--- |FIXED CC||liuhongt at gcc dot gnu.org --- Comment #8 from Hongtao Liu --- I can't reproduce the issue with testcase in #c1 since gcc7.1. So closed as fixed.

[Bug tree-optimization/92492] AVX512: Missed vectorization opportunity

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92492 Bug 92492 depends on bug 92658, which changed state. Bug 92658 Summary: x86 lacks vector extend / truncate https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92658 What|Removed |Added -

[Bug target/95764] Failure to optimize usage of _mm512_set1_epi32 to a single instruction

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
||liuhongt at gcc dot gnu.org Status|NEW |RESOLVED --- Comment #3 from Hongtao Liu --- Broadcast from imm is on purpose. *** This bug has been marked as a duplicate of bug 87767 ***

[Bug target/87767] Missing AVX512 memory broadcast for constant vector

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87767 Hongtao Liu changed: What|Removed |Added CC||gabravier at gmail dot com --- Comment #23

[Bug target/94962] Suboptimal AVX2 code for _mm256_zextsi128_si256(_mm_set1_epi8(-1))

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
||liuhongt at gcc dot gnu.org Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED --- Comment #11 from Hongtao Liu --- Fixed in GCC13.1

[Bug tree-optimization/92645] Hand written vector code is 450 times slower when compiled with GCC compared to Clang

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92645 Bug 92645 depends on bug 92658, which changed state. Bug 92658 Summary: x86 lacks vector extend / truncate https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92658 What|Removed |Added -

[Bug target/92611] auto vectorization failed for type promotation

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92611 Bug 92611 depends on bug 92658, which changed state. Bug 92658 Summary: x86 lacks vector extend / truncate https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92658 What|Removed |Added -

[Bug target/92658] x86 lacks vector extend / truncate

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
|RESOLVED CC||liuhongt at gcc dot gnu.org Known to work||14.1.0 --- Comment #28 from Hongtao Liu --- Fixed in GCC14.1

[Bug target/82735] _mm256_zeroupper does not invalidate previously computed registers

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82735 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org Known to

[Bug target/58889] GCC 4.9 fails to compile certain functions with intrinsics with __attribute__((target))

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
||liuhongt at gcc dot gnu.org --- Comment #4 from Hongtao Liu --- Fixed.

[Bug tree-optimization/53947] [meta-bug] vectorizer missed-optimizations

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53947 Bug 53947 depends on bug 36844, which changed state. Bug 36844 Summary: Vectorizer doesn't support INT<->FP conversions with different size https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36844 What|Removed |Adde

[Bug tree-optimization/96654] Failure to optimize vectorized conversion to `int` with AVX

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96654 Bug 96654 depends on bug 36844, which changed state. Bug 36844 Summary: Vectorizer doesn't support INT<->FP conversions with different size https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36844 What|Removed |Adde

[Bug tree-optimization/36844] Vectorizer doesn't support INT<->FP conversions with different size

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36844 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org

[Bug target/82897] Unnecessary zero-extension when loading mask register from memory

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82897 Hongtao Liu changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/82897] Unnecessary zero-extension when loading mask register from memory

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82897 --- Comment #12 from Hongtao Liu --- (In reply to Andrew Pinski from comment #10) > Looks like this was fixed in GCC 15: > ``` > foo: > .LFB7284: > .cfi_startproc > vmovd %edi, %xmm2 > vmovdqa32 %zmm1, %zmm4 >

[Bug target/82897] Unnecessary zero-extension when loading mask register from memory

2025-06-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82897 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/103750] [i386] GCC schedules KMOV instructions that destroys performance in loop

2025-06-03 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
|--- |FIXED CC||liuhongt at gcc dot gnu.org --- Comment #19 from Hongtao Liu --- Looks like it's fixed by r16-170-ga670ebde399548. Now it generates decent code as "_Z8qustrchrPDsS_Ds": cmp rdi, rsi

[Bug testsuite/120457] gcc.dg/vect/pr79920.c fail starting with r16-924-g1bc5b47f5b06dc

2025-05-29 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120457 --- Comment #2 from Hongtao Liu --- (In reply to Hongtao Liu from comment #1) > double __attribute__((noinline,noclone)) > compute_integral (double w_1[18]) > { > double A = 0; > double t33[2][6] = {{0.0, 0.0, 0.0, 0.0, 0.0, 0.0}, >

[Bug testsuite/120457] gcc.dg/vect/pr79920.c fail starting with r16-924-g1bc5b47f5b06dc

2025-05-29 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120457 --- Comment #1 from Hongtao Liu --- double __attribute__((noinline,noclone)) compute_integral (double w_1[18]) { double A = 0; double t33[2][6] = {{0.0, 0.0, 0.0, 0.0, 0.0, 0.0}, {0.0, 0.0, 0.0, 0.0, 0.0, 0.0}}; double t43[2] = {0.

[Bug target/120428] [14/15/16 regression] Suboptimal autovec involving blocked permutation and std::copy

2025-05-28 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120428 --- Comment #16 from Hongtao Liu --- (In reply to Jonathan Wakely from comment #15) > (In reply to Hongtao Liu from comment #13) > > The inner loop is not completely unrolled since std::copy is lowered to > > __builtin_memmove instead of __built

[Bug target/120428] [14/15/16 regression] Suboptimal autovec involving blocked permutation and std::copy

2025-05-27 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120428 --- Comment #14 from Hongtao Liu --- (In reply to Hongtao Liu from comment #13) > > > > constexpr std::size_t ProcessChunkSize = BlockSize * OrderSize; > > > > std::array buffer{}; > > > > std::byte* const bytes = reinterpret_cast

[Bug target/120428] [14/15/16 regression] Suboptimal autovec involving blocked permutation and std::copy

2025-05-27 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120428 --- Comment #13 from Hongtao Liu --- > > constexpr std::size_t ProcessChunkSize = BlockSize * OrderSize; > > std::array buffer{}; > > std::byte* const bytes = reinterpret_cast(data); > > for (std::size_t i = 0; i < TotalSize

[Bug middle-end/112824] Stack spills and vector splitting with vector builtins

2025-05-27 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112824 --- Comment #11 from Hongtao Liu --- > > Add --param sra-max-scalarization-size-Ospeed=2048 will eliminate those > spills > > So for sra we can consider using MOVE_MAX * move_ratio as the size limit for > Ospeed which represents real backend

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for 2 grouped load with same base pointer (taken as 1 interleaved load)

2025-05-27 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/53947] [meta-bug] vectorizer missed-optimizations

2025-05-27 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53947 Bug 53947 depends on bug 119181, which changed state. Bug 119181 Summary: Missed vectorization due to imperfect SLP discovery for 2 grouped load with same base pointer (taken as 1 interleaved load) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119

[Bug middle-end/120378] Support narrowing clip idiom

2025-05-21 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120378 --- Comment #1 from Hongtao Liu --- > The ifcvt'ed code before vect is: > > _4 = *_3; > x.0_12 = (unsigned int) _4; > _38 = -x.0_12; > _15 = (int) _38; > _16 = _15 >> 31; > _29 = x.0_12 > 255; > _17 = _29 ? _16 : _4; > _18 = (u

[Bug middle-end/118994] GCC fails to optimize (a >> 1) + (b >> 1) + ((a | b) & 1) to PAVGB/PAVGW (or equivalent instruction)

2025-05-20 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118994 Hongtao Liu changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/120215] [16 Regression] FAIL: gcc.target/i386/pr78794.c scan-assembler pandn by r16-517-g993aa0bd28722c

2025-05-14 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120215 Hongtao Liu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/120215] [16 Regression] FAIL: gcc.target/i386/pr78794.c scan-assembler pandn by r16-517-g993aa0bd28722c

2025-05-13 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120215 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug middle-end/120184] --gc-section can't discard unused section due to fpatchable-function-entry ?

2025-05-08 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120184 Hongtao Liu changed: What|Removed |Added Resolution|FIXED |INVALID

[Bug middle-end/120184] --gc-section can't discard unused section due to fpatchable-function-entry ?

2025-05-08 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120184 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug middle-end/120184] New: --gc-section can't discard unused section due to fpatchable-function-entry ?

2025-05-08 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
erity: normal Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: liuhongt at gcc dot gnu.org Target Milestone: --- cat test.c int foo1(void) { static int foo_1; return ++foo_1; } int foo2(void) { s

[Bug gcov-profile/118508] 10% performance drop when enabling autofdo for spec2017 554.roms_r

2025-05-07 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118508 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug gcov-profile/118581] auto_profile can't annotate bb with all debug_stmt which assigned value with constant

2025-04-29 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118581 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/119879] [16 Regression] FAIL: gcc.target/i386/avx512fp16-trunc-extendvnhf.c since r16-39

2025-04-21 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119879 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Target Milestone|16.0

[Bug target/119879] New: [r16-39 Regression] FAIL: gcc.target/i386/avx512fp16-trunc-extendvnhf.c

2025-04-20 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: liuhongt at gcc dot gnu.org Target Milestone: --- [r16-39 Regression] FAIL: gcc.target/i386/avx512fp16-trunc-extendvnhf.c On Linux/x86_64

[Bug target/108134] x86 Operand Modifiers documentation issue

2025-04-14 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108134 Hongtao Liu changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/108134] x86 Operand Modifiers documentation issue

2025-04-13 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108134 --- Comment #4 from Hongtao Liu --- (In reply to Hongtao Liu from comment #3) > (In reply to sandra from comment #2) > > This was introduced by commit 0fec3f62b9bfc03e5088a09036791c2ac84fe0c8. I > > wondered if there might have been a patch hun

[Bug target/108134] x86 Operand Modifiers documentation issue

2025-04-11 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
at gcc dot gnu.org |liuhongt at gcc dot gnu.org --- Comment #3 from Hongtao Liu --- (In reply to sandra from comment #2) > This was introduced by commit 0fec3f62b9bfc03e5088a09036791c2ac84fe0c8. I > wondered if there might have been a patch hunk to update the example that > didn&

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #12 from Hongtao Liu --- Let's just fix it in GCC16, either solution is ugly.

[Bug gcov-profile/118551] Autofdo regressed 538.imagick_r by ~10% with -march=x86-64-v3 -O2

2025-04-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118551 --- Comment #6 from Hongtao Liu --- (In reply to Jan Hubicka from comment #5) > as discussed in PR111551 the SPEC train run does not include hottest loop of > MorphologyApply, so MeanShiftImage may have same issue and auto-fdo may be > kind of c

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-07 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #6 from Hongtao Liu --- (In reply to Haochen Jiang from comment #4) > (In reply to Hongtao Liu from comment #3) > > (In reply to Hongtao Liu from comment #2) > > > (In reply to Richard Biener from comment #1) > > > > I think we need

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-06 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #3 from Hongtao Liu --- (In reply to Hongtao Liu from comment #2) > (In reply to Richard Biener from comment #1) > > I think we need to disable the effect of -mno-evex512, looks like there's > > still traces of it left? > > Let's ha

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-06 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/102294] memset expansion is sometimes slow for small sizes

2025-04-06 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102294 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/119596] x86: too eager use of rep movsq/rep stosq for inlined ops

2025-04-06 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119596 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/101017] ICE: Segmentation fault, convert_memory_address_addr_space_1 with vector_size(32) and target_clone arch=core-avx2/default

2025-03-26 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101017 --- Comment #13 from Hongtao Liu --- (In reply to David Binderman from comment #12) > (In reply to Hongtao Liu from comment #11) > > (In reply to David Binderman from comment #10) > > > Did this ever happen ? > > > > > > Similar test case gcc/t

[Bug target/119464] VEC_PERM_EXPR not optimized to pslldq instruction for AVX2 and AVX512BW

2025-03-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119464 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/119368] immintrin code running slower with gcc than clang

2025-03-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368 --- Comment #4 from Hongtao Liu --- > > But for this case, I think targetm.can_change_mode_class (op_mode, > result_mode, ALL_REGS) is not needed since it's memory. I mean case in #c1, for case in #c0, it's more complicated. 1. It's also rela

[Bug target/114591] [12/13/14/15 Regression] register allocators introduce an extra load operation since gcc-12

2025-03-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114591 --- Comment #18 from Hongtao Liu --- (In reply to Hongtao Liu from comment #16) > > > > 4952 /* See if a MEM has already been loaded with a widening operation; > > 4953 if it has, we can use a subreg of that. Many CISC machines >

[Bug target/119368] immintrin code running slower with gcc than clang

2025-03-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/119425] [15 Regression] ICE: in extract_constrain_insn, at recog.cc:2783 insn does not satisfy its constraints: {avx2_pblenddv8si} since r15-1679

2025-03-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119425 Hongtao Liu changed: What|Removed |Added CC||lin1.hu at intel dot com --- Comment #2 f

[Bug target/117452] ICE: in patch_jump_insn, at cfgrtl.cc:1303 with -Ofast -mavx10.2 and __bf16

2025-03-19 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117452 Hongtao Liu changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/115842] [15 Regression] 6.5% slowdown of 548.exchange2_r on Intel Ice Lake

2025-03-18 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115842 --- Comment #8 from Hongtao Liu --- (In reply to Tamar Christina from comment #7) > (In reply to Hongtao Liu from comment #6) > > I noticed some double-counting of cost in group-candidate (regarding loop > > invariant expressions), this modific

[Bug target/118753] [15 Regression] [meta-bug] GCC 15 Regression on x86

2025-03-18 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118753 Bug 118753 depends on bug 117069, which changed state. Bug 117069 Summary: [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 What|Removed

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-03-18 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|REOPENED

[Bug target/117452] ICE: in patch_jump_insn, at cfgrtl.cc:1303 with -Ofast -mavx10.2 and __bf16

2025-03-17 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
||liuhongt at gcc dot gnu.org --- Comment #4 from Hongtao Liu --- I'll take a look.

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-03-17 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 --- Comment #15 from Hongtao Liu --- (In reply to Sam James from comment #7) > This stopped failing for me around: > > commit 2bc3ea210565dc7cdbba9adb31acceefed406254 > Author: Sam James > Date: Fri Nov 22 15:20:45 2024 + > > saving

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-03-17 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 --- Comment #14 from Hongtao Liu --- (In reply to Sam James from comment #13) > (In reply to Hongtao Liu from comment #9) > > I didn't find this commit in gcc trunk? > > Ah, sorry for confusion: it's from my local test results. Only the date >

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-03-16 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 --- Comment #9 from Hongtao Liu --- (In reply to Sam James from comment #7) > This stopped failing for me around: > > commit 2bc3ea210565dc7cdbba9adb31acceefed406254 > Author: Sam James > Date: Fri Nov 22 15:20:45 2024 + > > saving

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-03-16 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 --- Comment #8 from Hongtao Liu --- (In reply to Hongtao Liu from comment #6) > It looks like the testcase is fragile, it's supposed to check the compiler > ability of generating code_6_gottpoff_reloc instruction, but failed since > there's a se

[Bug target/114978] [14/15 regression] 548.exchange2_r 14%-28% regressions on Loongarch64 after gcc 14 snapshot 20240317

2025-03-16 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114978 --- Comment #33 from Hongtao Liu --- I have a fix in ivopt for x86 in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115842#c6, you may try to see if that helps?

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for 2 grouped load with same base pointer (taken as 1 interleaved load)

2025-03-11 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #11 from Hongtao Liu --- More common case is typedef int v8si __attribute__((vector_size(32))); v8si foo1 (v8si a, v8si b) { v8si c = __builtin_shufflevector (a, b, 0, 1, 2, 11, 4, 5, 6, 15); v8si d = __builtin_shufflevect

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for 2 grouped load with same base pointer (taken as 1 interleaved load)

2025-03-11 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #10 from Hongtao Liu --- But it still can't fix the issue with void foo (int* a, int* restrict b) { b[0] = a[0] * a[8]; b[1] = a[1] * a[9]; b[2] = a[2] * a[10]; b[3] = a[11] * a[3]; b[4] = a[12] * a[4]; b[5]

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for 2 grouped load with same base pointer (taken as 1 interleaved load)

2025-03-11 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #8 from Hongtao Liu --- (In reply to Richard Biener from comment #7) > The issue is we detect this as a single interleaving group: > > t.c:12:1: note: Detected interleaving load of size 264 > t.c:12:1: note: _1 = *a_26(D);

[Bug tree-optimization/119209] New: SLP failed to recognize dot_prod pattern(it's taked as a normal reduction)

2025-03-10 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
erity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: liuhongt at gcc dot gnu.org Target Milestone: --- int foo (unsigned char* a, char* b, int n, int stride, int* __restrict dst) { int sum = 0; sum +

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for strided & interleaved load.

2025-03-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #6 from Hongtao Liu --- void foo (int* a, int* __restrict b, int* c) { b[0] = a[0] * c[256]; b[1] = c[257] * a[1]; b[2] = a[2] * c[258]; b[3] = c[259] * a[3]; b[4] = c[260] * a[4]; b[5] = c[261] * a[5]; b[

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for strided & interleaved load.

2025-03-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #3 from Hongtao Liu --- void foo (int* a, int* __restrict b) { b[0] = a[0] * a[256]; b[1] = a[257] * a[1]; b[2] = a[2] * a[258]; b[3] = a[259] * a[3]; b[4] = a[260] * a[4]; b[5] = a[261] * a[5]; b[6] = a[6

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for strided & interleaved load.

2025-03-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #5 from Hongtao Liu --- > > Looks like if both operands satisfy same STMT_VINFO_GROUPED_ACCESS as first > stmt, we'd better have a heuristic to choose more closer one? If all grouped operations satisfy commutative property.

[Bug tree-optimization/119181] Missed vectorization due to imperfect SLP discovery for strided & interleaved load.

2025-03-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119181 --- Comment #2 from Hongtao Liu --- (In reply to Andrew Pinski from comment #1) > Looks like it is missing the commutativity property of multiply. Note compiler options is with Ofast.

[Bug tree-optimization/119181] New: Missed vectorization due to imperfect SLP discovery for strided & interleaved load.

2025-03-09 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
RMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: liuhongt at gcc dot gnu.org Target Milestone: --- void foo (double* a, double* __restrict b) { b[0] = a[0] * a[256]; b[1] = a[257] * a[1];

[Bug target/119142] [15 Regression] Many regressions since r15-7852 on i686-linux

2025-03-06 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119142 --- Comment #6 from Hongtao Liu --- (In reply to Haochen Jiang from comment #5) > (In reply to Haochen Jiang from comment #4) > > I suppose that patch should be reverted, caused by Richard S's patch. > > > > https://gcc.gnu.org/pipermail/gcc-re

[Bug target/115842] [15 Regression] 6.5% slowdown of 548.exchange2_r on Intel Ice Lake

2025-03-05 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115842 --- Comment #6 from Hongtao Liu --- I noticed some double-counting of cost in group-candidate (regarding loop invariant expressions), this modification reduces the number of instructions executed by ~8% for exchange_r binary compiled with -marc

[Bug target/119083] Remove SSE_FIRST_REG from ix86_class_likely_spilled_p

2025-03-04 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119083 --- Comment #10 from Hongtao Liu --- (In reply to Hongtao Liu from comment #9) > (In reply to H.J. Lu from comment #8) > > Created attachment 60647 [details] > > A patch to remove CREG and BREG from ix86_class_likely_spilled_p > > > > Hongtao,

[Bug tree-optimization/119103] shift not demotated when shift amount range is known

2025-03-03 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119103 --- Comment #5 from Hongtao Liu --- (In reply to Hongtao Liu from comment #4) > vect_recog_over_widening_pattern could be extended with range info for this? Looks like vectorizer already have range_info from vect_determine_precisions_from_range

[Bug tree-optimization/119103] shift not demotated when shift amount range is known

2025-03-03 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119103 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/119083] Remove SSE_FIRST_REG from ix86_class_likely_spilled_p

2025-03-03 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119083 --- Comment #9 from Hongtao Liu --- (In reply to H.J. Lu from comment #8) > Created attachment 60647 [details] > A patch to remove CREG and BREG from ix86_class_likely_spilled_p > > Hongtao, can you measure its impact on SPEC CPU 2017? Ok.

[Bug target/118996] Should TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P return false for x86-64?

2025-03-03 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118996 --- Comment #16 from Hongtao Liu --- (In reply to Hongtao Liu from comment #14) > (In reply to H.J. Lu from comment #13) > > (In reply to H.J. Lu from comment #11) > > > Created attachment 60609 [details] > > > An untested patch > > > > Hongtao

[Bug target/119083] Remove SSE_FIRST_REG from ix86_class_likely_spilled_p

2025-03-03 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119083 --- Comment #7 from Hongtao Liu --- (In reply to Hongtao Liu from comment #5) > (In reply to H.J. Lu from comment #3) > > Created attachment 60640 [details] > > A patch to remove SSE_FIRST_REG from ix86_class_likely_spilled_p > > > > Hongtao, c

[Bug target/118996] Should TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P return false for x86-64?

2025-03-02 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118996 --- Comment #14 from Hongtao Liu --- (In reply to H.J. Lu from comment #13) > (In reply to H.J. Lu from comment #11) > > Created attachment 60609 [details] > > An untested patch > > Hongtao, do you have SPEC CPU2017 data on this patch? I haven

[Bug target/119083] Remove SSE_FIRST_REG from ix86_class_likely_spilled_p

2025-03-02 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119083 --- Comment #5 from Hongtao Liu --- (In reply to H.J. Lu from comment #3) > Created attachment 60640 [details] > A patch to remove SSE_FIRST_REG from ix86_class_likely_spilled_p > > Hongtao, can you measure its impact on SPEC CPU2017? Sure.

[Bug target/118996] Should TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P return false for APX?

2025-02-27 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118996 --- Comment #7 from Hongtao Liu --- (In reply to H.J. Lu from comment #6) > SMALL_REGISTER_CLASSES was added by > > commit c98f874233428d7e6ba83def7842fd703ac0ddf1 > Author: James Van Artsdalen > Date: Sun Feb 9 13:28:48 1992 + > >

[Bug target/118992] Redundant argument set up for call

2025-02-26 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118992 --- Comment #13 from Hongtao Liu --- (In reply to H.J. Lu from comment #11) > Created attachment 60590 [details] > A patch > > Can you try this on SPEC CPU? No big impact for both O2 and Ofast on SPEC2017.

[Bug middle-end/118994] GCC fails to optimize (a >> 1) + (b >> 1) + ((a | b) & 1) to PAVGB/PAVGW (or equivalent instruction)

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118994 --- Comment #7 from Hongtao Liu --- diff --git a/gcc/match.pd b/gcc/match.pd index 5c679848bdf..d6a465c963c 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -11348,3 +11348,28 @@ and, } (if (full_perm_p) (vec_perm (op@3 @0 @

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 --- Comment #6 from Hongtao Liu --- It looks like the testcase is fragile, it's supposed to check the compiler ability of generating code_6_gottpoff_reloc instruction, but failed since there's a seg_prefixed memory usage(r14-6242-gd564198f960a2f

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 Hongtao Liu changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED

[Bug target/118753] [15 Regression] [meta-bug] GCC 15 Regression on x86

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118753 Bug 118753 depends on bug 117069, which changed state. Bug 117069 Summary: [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 What|Removed

[Bug target/117069] [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 Hongtao Liu changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug target/118992] Redundant argument set up for call

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118992 --- Comment #12 from Hongtao Liu --- (In reply to H.J. Lu from comment #11) > Created attachment 60590 [details] > A patch > > Can you try this on SPEC CPU? Sure.

[Bug target/118753] [15 Regression] [meta-bug] GCC 15 Regression on x86

2025-02-25 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118753 Bug 118753 depends on bug 117069, which changed state. Bug 117069 Summary: [15 Regression] gcc.target/i386/apx-ndd-tls-1b.c since r15-268-g9dbff9c05520a7 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117069 What|Removed

[Bug middle-end/118994] GCC fails to optimize (a >> 1) + (b >> 1) + ((a | b) & 1) to PAVGB/PAVGW (or equivalent instruction)

2025-02-24 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118994 --- Comment #6 from Hongtao Liu --- (In reply to John Platts from comment #5) > GCC also fails to optimize (a | b) - ((a ^ b) >> 1) down to a single SSE2 > PAVGB/PAVGW, NEON/SVE2 SRHADD/URHADD, AltiVec > vavgsb/vavgsh/vavgsw/vavgub/vavguh/vavguw

[Bug target/118992] Redundant argument set up for call

2025-02-24 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118992 --- Comment #9 from Hongtao Liu --- (In reply to H.J. Lu from comment #8) > (In reply to Richard Biener from comment #7) > > > > > >else if (targetm.small_register_classes_for_mode_p (GET_MODE (x))) > > > record = false; > > >

[Bug target/118996] Should TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P return false for APX?

2025-02-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118996 --- Comment #3 from Hongtao Liu --- Original commit is added to avoid reload failure ~24 years ago, maybe we can try to remove the check in cse.cc. commit 8bf4dfc24f1957b8f645e362e354655fb851fc89 Author: Geoffrey Keating Date: Mon Jul 2 23:2

[Bug middle-end/118994] GCC fails to optimize (a >> 1) + (b >> 1) + ((a | b) & 1) to PAVGB/PAVGW (or equivalent instruction)

2025-02-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118994 Hongtao Liu changed: What|Removed |Added CC||liuhongt at gcc dot gnu.org --- Comment

[Bug target/118996] Should TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P return false for APX?

2025-02-23 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118996 --- Comment #1 from Hongtao Liu --- Looking at the hook description, it looks like x86 still need nozero return values under apx (due to AREG, DREG, CREG, BREG, SIREG, DIREG)

[Bug bootstrap/118802] [15 regression] Bootstrap comparison failure on libphobos/libdruntime/core/internal/gc/impl/conservative/gc.o since r15-7400-gd3ff498c478ace

2025-02-20 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118802 --- Comment #22 from Hongtao Liu --- (In reply to Sam James from comment #16) > Bisected to r15-7400-gd3ff498c478ace (not CCing anyone yet as not enough > useful information). There's a new patch in [1] which will revert the commit and may fix

[Bug target/118940] [15 regression] [x86] Failure to build ipxe (inline assembly fails with 'asm' operand has impossible constraints or there are not enough registers) since r15-2217-ga3f03891065cb9

2025-02-19 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118940 --- Comment #11 from Hongtao Liu --- (In reply to Miao Wang from comment #10) > (In reply to Hongtao Liu from comment #9) > > > > > > > Because I think the operands usage is broken. > > > > > > Additionally, by removing the do{ ... } while(0)

[Bug target/118940] [15 regression] [x86] Failure to build ipxe (inline assembly fails with 'asm' operand has impossible constraints or there are not enough registers) since r15-2217-ga3f03891065cb9

2025-02-19 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118940 --- Comment #9 from Hongtao Liu --- > > > Because I think the operands usage is broken. > > Additionally, by removing the do{ ... } while(0) wrap from > bigint_test_exec(), the issue disappears. I believe that if it is the > operands usage is

[Bug rtl-optimization/117081] [15 Regression] FAIL: gcc.target/i386/pr91384.c since r15-1619-g3b9b8d6cfdf593

2025-02-17 Thread liuhongt at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117081 --- Comment #20 from Hongtao Liu --- > > W/o more usage of callee-saved registers, callee needs to restore them > before exit which is not needed if more caller-saved register are used. W/ https://gcc.gnu.org/pipermail/gcc-patches/2025-Februa

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