[Bug middle-end/37908] [4.2/4.3/4.4 regression] atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand

2008-10-29 Thread kokseng at ieee dot org
--- Comment #7 from kokseng at ieee dot org 2008-10-29 09:37 --- The only problem is whether there are codes out there that depend on "NEGATE-and-AND"? Frankly speaking, when I was reminded about the 'nand' comment on gcc manual, only then I remembered many mo

[Bug middle-end/37908] [4.2/4.3/4.4 regression] atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand

2008-10-24 Thread kokseng at ieee dot org
--- Comment #4 from kokseng at ieee dot org 2008-10-24 12:18 --- Okay, now I noticed the 'nand' comment on the documentation for atomic builtins, the code does implement the 'negate and AND' logic, which is named 'nand'. On page 164 of icc

[Bug c/37908] New: atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand

2008-10-23 Thread kokseng at ieee dot org
4.2.4 Status: UNCONFIRMED Severity: major Priority: P3 Component: c AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: kokseng at ieee dot org http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37908