[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #11 from Haochen Jiang --- We have two temporary solutions in GCC 14 and GCC 15 since we could not simply reject -mno-evex512. In GCC 16, since it is deprecated, no more issue for that. Plan A: Use vmovq to only clear lower 64 bit.

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #10 from Haochen Jiang --- (In reply to Haochen Jiang from comment #9) > Proposed change: > > diff --git a/gcc/config/i386/i386-options.cc > b/gcc/config/i386/i386-options.cc > index a9fac011f3d..789c1f1ae54 100644 > --- a/gcc/confi

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #9 from Haochen Jiang --- Proposed change: diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index a9fac011f3d..789c1f1ae54 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #8 from Haochen Jiang --- After some more consideration, my current plan is to raise an error if -mno-evex512 is not used with AVX512VL enabled in GCC 14 and GCC 15, since w/o AVX512VL, we could only use scalar instructions. I suppos

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #7 from Haochen Jiang --- The problem is under msabi, -fzero-call-used-regs=all will also try to clear xmm16+. However, under -mavx512f -mno-evex512, we have no instructions to do that. There are two solutions for that: 1. Reject m

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-07 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #5 from Haochen Jiang --- Just take a quick try on the option combination. Eliminating either -fzero-call-used-regs=all or -mabi=ms will not get ICE.

[Bug target/119617] ICE: in standard_sse_constant_opcode, at config/i386/i386.cc:5465 with -fzero-call-used-regs=all -mabi=ms -mavx512f -mno-evex512

2025-04-07 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119617 --- Comment #4 from Haochen Jiang --- (In reply to Hongtao Liu from comment #3) > (In reply to Hongtao Liu from comment #2) > > (In reply to Richard Biener from comment #1) > > > I think we need to disable the effect of -mno-evex512, looks like

[Bug target/119549] [14/15 Regression] SSE4 code inlined into no-sse4 function

2025-03-31 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119549 --- Comment #3 from Haochen Jiang --- That is odd the AVX10.1 patch would change that behavior. Lin, could you have a look on that?

[Bug target/119410] 5% slowdown of 510.parest_r on Intel Ice Lake

2025-03-24 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119410 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug c++/119383] [15 Regression] Boost 1.85 lib build fail after commit r15-8011

2025-03-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119383 --- Comment #4 from Haochen Jiang --- I am dealing with AVX10 refactor issue this week and have no time to look into that. I will try to find a way to reduce that next week or someone could reproduce that to look into that for now.

[Bug c++/119383] [15 Regression] Boost 1.85 lib build fail after commit r15-8011

2025-03-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119383 --- Comment #2 from Haochen Jiang --- I have got the upcoming target in thread test fail: ...failed updating 18 targets... testing.capture-output ../../../bin.v2/libs/thread/test/ex_executor.test/gcc-15/dbg/thrd-mlt/vsblt-hdn/ex_executor.run

[Bug c++/119383] New: [15 Regression] Boost 1.85 lib build fail after commit r15-8011

2025-03-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119383 Bug ID: 119383 Summary: [15 Regression] Boost 1.85 lib build fail after commit r15-8011 Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug target/119270] [15 Regression] 5% slowdown of 507.cactuBSSN_r on Intel Ice Lake

2025-03-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119270 --- Comment #5 from Haochen Jiang --- >From my run, it should have fixed the regression. Thx!

[Bug target/119270] [15 Regression] 5% slowdown of 507.cactuBSSN_r on Intel Ice Lake

2025-03-17 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119270 --- Comment #1 from Haochen Jiang --- >From my bisect, it might caused by r15-7932 on single copy for Ice Lake. Guilty Commit: e355fe414aa3aaf215c7dd9dd789ce217a1b458c Author: Vladimir N. Makarov Date: 2025-03-11 04:27:51 Tuesday Diff: -2.45499

[Bug target/115024] [14/15 regression] 128 bit division performance regression, x86, between gcc-14 and gcc-13 using target clones on skylake platform

2025-03-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115024 --- Comment #10 from Haochen Jiang --- I could not reproduce that from scratch for now either since if I recalled that correctly, I reproduce that on one specific Sky Lake machine, not all. BTW, the DSB issue is some time just a "bad luck" caus

[Bug target/119142] [15 Regression] Many regressions since r15-7852 on i686-linux

2025-03-06 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119142 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/119142] [15 Regression] Many regressions since r15-7852 on i686-linux

2025-03-06 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119142 --- Comment #4 from Haochen Jiang --- I suppose that patch should be reverted, caused by Richard S's patch. https://gcc.gnu.org/pipermail/gcc-regression/2025-March/081825.html (I almost thought my script went buggy and needed to shut down toda

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-16 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 Haochen Jiang changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/117081] [15 Regression] FAIL: gcc.target/i386/pr91384.c since r15-1619-g3b9b8d6cfdf593

2025-02-16 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117081 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-13 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #8 from Haochen Jiang --- Proposed patch: https://gcc.gnu.org/pipermail/gcc-patches/2025-February/675748.html

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #7 from Haochen Jiang --- (In reply to Haochen Jiang from comment #6) > I am testing a patch with this fix: > > " > @@ -2751,10 +2752,11 @@ ix86_option_override_internal (bool main_args_p, > } > >/* Set EVEX512 if one of t

[Bug target/118813] [14/15 regression] avx512bwintrin.h is not `-Wsystem-headers -Wundef` clean since r14-4490-g03a8504815d539

2025-02-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118813 --- Comment #16 from Haochen Jiang --- Fixed so far on trunk and GCC14 for avx512bw intrin header.

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #6 from Haochen Jiang --- I am testing a patch with this fix: diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 3467ab0bbeb..f2c536d1e33 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/confi

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #5 from Haochen Jiang --- It is caused by the EVEX512 set and condition judge on warnings. EVEX512 should not be set or taken into consideration if AVX512 not explicitly enabled.

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #4 from Haochen Jiang --- (In reply to Haochen Jiang from comment #3) > Which makes this thing more weird than my expected is that avx10_2rounding > and avx10_2minmax intrin file seems not reporting the warning. It also > should from

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #3 from Haochen Jiang --- Which makes this thing more weird than my expected is that avx10_2rounding and avx10_2minmax intrin file seems not reporting the warning. It also should from my understanding, but it may shed the light of th

[Bug target/118815] [15 Regression] Getting `Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size` warning with -Wsystem-headers

2025-02-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118815 --- Comment #2 from Haochen Jiang --- My guess (and probably it should be) is on the push and pop target for AVX10 related options and evex512 usage causing the issue. AVX10.2-256 will only use 256 size, and there is elsewhere enabling evex512

[Bug target/118813] [14/15 regression] avx512bwintrin.h is not `-Wsystem-headers -Wundef` clean since r14-4490-g03a8504815d539

2025-02-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118813 --- Comment #12 from Haochen Jiang --- And the define seems not to be the workaround for those two PRs. It is much like a typo when moving things around for AVX10 since GCC13 (before AVX10 introduction), it is still wrapped by #ifdef.

[Bug target/118813] [14/15 regression] avx512bwintrin.h is not `-Wsystem-headers -Wundef` clean since r14-4490-g03a8504815d539

2025-02-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118813 --- Comment #11 from Haochen Jiang --- It should be #ifdef instead of #if here from my first glance.

[Bug target/118270] [15 Regression] Many AVX10.2 test failures

2025-01-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118270 Haochen Jiang changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/118609] gcc.target/i386/amxmovrs-t2rpntlvw-2.c etc. FAIL

2025-01-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118609 --- Comment #1 from Haochen Jiang --- I am going to revise the testcase through the thread: https://gcc.gnu.org/pipermail/gcc-patches/2025-January/674157.html Dup with PR118270

[Bug target/118270] [15 Regression] Many AVX10.2 test failures

2025-01-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118270 --- Comment #2 from Haochen Jiang --- I just revised a lot more mnemonics in Binutils first to catch up with Binutils 2.44 freeze this Sunday. Thus, there would be more tests compiling with latest Binutils fail. They are expected. I am working

[Bug target/118270] [15 Regression] Many AVX10.2 test failures

2025-01-01 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118270 --- Comment #1 from Haochen Jiang --- It is caused by binutils and gcc mnemonics currently misaligned. The mnemonics got some changes after GCC upstreamed. Binutils is using some new mnemonics, while GCC does not. Since there would be more comi

[Bug target/117697] gcc.target/i386/avx10_2-vmovd-1.c etc. FAIL

2024-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117697 --- Comment #9 from Haochen Jiang --- (In reply to r...@cebitec.uni-bielefeld.de from comment #8) > > --- Comment #7 from Haochen Jiang --- > > Testcase fixed on trunk. > > Great, thanks. > > > Since I do not have a Solaris machine, I could n

[Bug sanitizer/117731] [15 Regression] libsanitizer builds not as c++17 even though it uses c++17 features

2024-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117731 --- Comment #4 from Haochen Jiang --- (In reply to Andrew Pinski from comment #3) > (In reply to Haochen Jiang from comment #2) > > I also notice that but why the warning does not appear previously since it > > is always using gnu14? > > becaus

[Bug sanitizer/117731] [15 Regression] libsanitizer builds not as c++17 even though it uses c++17 features

2024-11-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117731 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/117697] gcc.target/i386/avx10_2-vmovd-1.c etc. FAIL

2024-11-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117697 --- Comment #7 from Haochen Jiang --- Testcase fixed on trunk. Since I do not have a Solaris machine, I could not to solve the problem on Solaris/x86 for: > Weirdly, adding -fomit-frame-pointer to the testcases > make no difference on Solaris

[Bug target/117697] gcc.target/i386/avx10_2-vmovd-1.c etc. FAIL

2024-11-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117697 --- Comment #5 from Haochen Jiang --- Patch with change Hongtao proposed: https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669647.html

[Bug target/117697] gcc.target/i386/avx10_2-vmovd-1.c etc. FAIL

2024-11-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117697 --- Comment #3 from Haochen Jiang --- Proposed change: diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c index 6a5d84ac6cd..be1631f3060 100644 --- a/gcc/testsuite/gcc.target/i386/avx1

[Bug target/117697] gcc.target/i386/avx10_2-vmovd-1.c etc. FAIL

2024-11-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117697 --- Comment #2 from Haochen Jiang --- I see, let me change that.

[Bug tree-optimization/117527] [15 regression] 511.povary_r with march_native_ofast_lto build fail since r15-5021

2024-11-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117527 Haochen Jiang changed: What|Removed |Added Resolution|--- |DUPLICATE Status|WAITING

[Bug middle-end/117496] [15 Regression] infinite recursion in insert_predicates_for_cond() on cdrkit-1.1.11

2024-11-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117496 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug tree-optimization/117527] New: [15 regression] 511.povary_r with march_native_ofast_lto build fail since r15-5021

2024-11-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117527 Bug ID: 117527 Summary: [15 regression] 511.povary_r with march_native_ofast_lto build fail since r15-5021 Product: gcc Version: 15.0 Status: UNCONFIRMED Sever

[Bug target/117301] Many AVX10 tests fail

2024-10-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117301 --- Comment #6 from Haochen Jiang --- Fixed on trunk.

[Bug target/117301] Many AVX10 tests fail

2024-10-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117301 --- Comment #4 from Haochen Jiang --- Proposed patch: https://gcc.gnu.org/pipermail/gcc-patches/2024-October/95.html

[Bug target/117137] [15 Regression] ICE: in extract_insn, at recog.cc:2882 unrecognizable insn: (compare:CCZ reg:V2DI reg:V2DI) with -O2 -msse4

2024-10-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117137 --- Comment #3 from Haochen Jiang --- >From my bisect: 5977b746db3925aaba37722f5312419d5f2968a5 is the first bad commit commit 5977b746db3925aaba37722f5312419d5f2968a5 Author: Richard Biener Date: Tue Oct 8 09:01:01 2024 +0200 tree-opti

[Bug target/117082] [15 Regression] FAIL: gcc.target/i386/stack-check-17.c since r15-1619-g3b9b8d6cfdf593

2024-10-14 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117082 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug middle-end/116065] [13/14 Regression] Function attribute optimize() might make ISA target attribute broken

2024-10-13 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116065 Haochen Jiang changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/117086] [15 Regression] ICE in tree check: expected vector_type, have boolean_type in TYPE_VECTOR_SUBPARTS, at tree.h:4255

2024-10-11 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117086 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/116617] x86_64: arch lunarlake not documented

2024-09-09 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116617 --- Comment #8 from Haochen Jiang --- Fixed on trunk, GCC14, GCC13.

[Bug target/116617] x86_64: arch lunarlake not documented

2024-09-05 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116617 --- Comment #4 from Haochen Jiang --- Proposed patch: https://gcc.gnu.org/pipermail/gcc-patches/2024-September/662455.html I would commit this next Monday.

[Bug target/116617] x86_64: arch lunarlake not documented

2024-09-05 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116617 --- Comment #3 from Haochen Jiang --- We will not add doc previously if the option is only an alias to another platform, which is similar for meteorlake and raptorlake. Lunarlake is actually the alias for arrowlake-s. That is why we don't add i

[Bug middle-end/116065] [13/14/15 Regression] Function attribute optimize() might make ISA target attribute broken

2024-07-25 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116065 --- Comment #4 from Haochen Jiang --- It seems to me gcc-13-3950-g071e428c24e is the guilty commit. 071e428c24ee8c1ed062597a093708bba29509c9 is the first bad commit commit 071e428c24ee8c1ed062597a093708bba29509c9 Author: Hongyu Wang Date: Th

[Bug middle-end/116065] [13/14/15 Regression] Function attribute optimize() might make ISA target attribute broken

2024-07-24 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116065 --- Comment #3 from Haochen Jiang --- Maybe I could first start with a bisect since GCC12.1 is known to ok and GCC13.1 is known to fail.

[Bug other/116080] New tests from r15-2233-g8d1af8f904a0c0 fail

2024-07-24 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116080 --- Comment #4 from Haochen Jiang --- Hmm, it is interesting that I even could not reproduce that on the same machine.

[Bug other/116080] New tests from r15-2233-g8d1af8f904a0c0 fail

2024-07-24 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116080 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/116065] New: [13/14/15 Regression] Function attribute optimize() might make ISA target attribute broken

2024-07-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116065 Bug ID: 116065 Summary: [13/14/15 Regression] Function attribute optimize() might make ISA target attribute broken Product: gcc Version: 15.0 Status: UNCONFIRMED

[Bug target/116046] New: vmovdqa64 is used when unaligned memory caused by unaligned %rsp/%rbp

2024-07-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116046 Bug ID: 116046 Summary: vmovdqa64 is used when unaligned memory caused by unaligned %rsp/%rbp Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug target/101017] ICE: Segmentation fault, convert_memory_address_addr_space_1 with vector_size(32) and target_clone arch=core-avx2/default

2024-06-27 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101017 --- Comment #9 from Haochen Jiang --- I would rather do not touch all the ISA level since it might cause unexpected problems after thinking twice. Since there is also indirect call, I will throw an error for this case.

[Bug target/101017] ICE: Segmentation fault, convert_memory_address_addr_space_1 with vector_size(32) and target_clone arch=core-avx2/default

2024-06-18 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101017 --- Comment #8 from Haochen Jiang --- One potential solution is to let the resolver ISA level becomes the highest one in target_clones instead of the default one. Then it will not get the memory/register mismatch when passing/returning argument

[Bug target/115024] [14/15 regression] 128 bit division performance regression, x86, between gcc-14 and gcc-13 using target clones on skylake platform

2024-06-04 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115024 --- Comment #6 from Haochen Jiang --- I have got a machine to reproduce the regression. Seem like a DSB miss from my data, but don't know why. Need more investigation.

[Bug tree-optimization/115208] [15 Regression] Memory consumption get extremely high after r15-807-gfae5e6a4dfcf92

2024-05-26 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115208 Haochen Jiang changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug middle-end/115208] [15 Regression] Memory consumption get extremely high after r15-809

2024-05-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115208 --- Comment #1 from Haochen Jiang --- Forgot to mention, the memory consumption collection is collected on x86_64 target in order to get the test finished. Therefore, we could debug on x86_64.

[Bug middle-end/115208] New: [15 Regression] Memory consumption get extremely high after r15-809

2024-05-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115208 Bug ID: 115208 Summary: [15 Regression] Memory consumption get extremely high after r15-809 Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug target/115025] [14/15 regression] prime computation performance regression, x86, between gcc-14 and gcc-13 on skylake platform

2024-05-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115025 Haochen Jiang changed: What|Removed |Added CC||jh at suse dot cz --- Comment #6 from H

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #22 from Haochen Jiang --- Fixed in GCC14 and GCC15

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #19 from Haochen Jiang --- (In reply to Haochen Jiang from comment #18) > SPEC SPEC seems all same binary to me. So there is no surprise. I suppose let's go with patch from Uros to just emphasize the problem.

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #18 from Haochen Jiang --- SPEC

[Bug target/115024] [14/15 regression] 128 bit division performance regression, x86, between gcc-14 and gcc-13 using target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115024 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #15 from Haochen Jiang --- I am doing like this way. Suppose should be same as Comment 8. diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index a6132911e6a..1e8334877d6 100644 --- a/gcc/config/i386/i386-

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #12 from Haochen Jiang --- (In reply to Hongtao Liu from comment #11) > (In reply to Haochen Jiang from comment #10) > > A patch like Comment 8 could definitely solve the problem. But I need to > > test more benchmarks to see if ther

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-17 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #10 from Haochen Jiang --- A patch like Comment 8 could definitely solve the problem. But I need to test more benchmarks to see if there is surprise. But, yes, as Uros said in Comment 9, maybe there is a chance we could do it better

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-17 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #6 from Haochen Jiang --- (In reply to Hongtao Liu from comment #5) > (In reply to Krzysztof Kanas from comment #4) > > I bisected the issue and it seems that commit > > 0368fc54bc11f15bfa0ed9913fd0017815dfaa5d introduces regression.

[Bug target/115025] [14/15 regression] prime computation performance regression, x86, between gcc-14 and gcc-13 on skylake platform

2024-05-16 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115025 --- Comment #5 from Haochen Jiang --- My guess is that for the prime judging loop: for (i = 5; i < max; i += 6) if ((n % i == 0) || (n % (i + 2) == 0)) return 0; In GCC13, it extracts the first l

[Bug target/115028] [15 regression] gcc.target/i386/pr101950-2.c FAILs

2024-05-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115028 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/115069] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/115071] performance regression, x86, between gcc-14 and gcc-13 using -O3 and _Pragma("GCC unroll 4") on skylake

2024-05-14 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115071 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/115002] [14/15 regression] wide integer vector performance regression, x86, between gcc-14 and gcc-13 using target clones on skylake platform

2024-05-14 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115002 --- Comment #5 from Haochen Jiang --- It seems that mainly caused by codesize increase in GCC14 since the actual instruction retired increase ratio is similar to the regression. Also, just like PR114987, I tried with GCC11, seems it gets the be

[Bug target/114987] [14/15 Regression] floating point vector regression, x86, between gcc 14 and gcc-13 using -O3 and target clones on skylake platforms

2024-05-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114987 --- Comment #7 from Haochen Jiang --- Furthermore, when I build with GCC11, the codegen is much better: vaddps 0xc0(%rsp),%ymm5,%ymm2 vaddps 0xe0(%rsp),%ymm4,%ymm1 vmovaps %ymm2,0x80(%rsp) vmovdq

[Bug target/114987] [14/15 Regression] floating point vector regression, x86, between gcc 14 and gcc-13 using -O3 and target clones on skylake platforms

2024-05-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114987 --- Comment #5 from Haochen Jiang --- What I have found is that the binary built with GCC13 and GCC14 will regress on Cascadelake and Skylake. But when I copied the binary to Icelake, it won't. Seems Icelake might fix this with micro-tuning. I

[Bug target/110621] x86_64: Test gcc.target/i386/pr105354-2.c fails with -fstack-protector

2024-04-26 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110621 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug testsuite/109596] [14 Regression] Lots of guality testcase fails on x86_64 after r14-162-gcda246f8b421ba

2024-04-13 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109596 --- Comment #18 from Haochen Jiang --- (In reply to Andrew Pinski from comment #16) > (In reply to Carlos Eduardo Seo from comment #15) > > I see some failures after this patch on aarch64-linux-gnu: > > > > FAIL: gcc.dg/guality/pr54693-2.c -O2

[Bug tree-optimization/114238] [14 regression] Multiple 554.roms_r run-time regressions (4%-20%) since r14-9193-ga0b1798042d033

2024-03-12 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114238 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com --- Comm

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-30 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 Haochen Jiang changed: What|Removed |Added CC||crazylht at gmail dot com --- Comment #

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 --- Comment #3 from Haochen Jiang --- (In reply to Haochen Jiang from comment #2) > Actually it is caused by option -funsafe-math-optimizations but not > -mavx10.1. > > Before my commit, while using option: > > -frounding-math -O3 -mavx512fp16

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 --- Comment #2 from Haochen Jiang --- Actually it is caused by option -funsafe-math-optimizations but not -mavx10.1. Before my commit, while using option: -frounding-math -O3 -mavx512fp16 -mavx512vl -funsafe-math-optimizations It will also re

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 --- Comment #1 from Haochen Jiang --- >From the first glance, it seems that the op here is wrongly interpreted. Investigating why.

[Bug target/113534] New: printf might report segmentation fault under -mabi=ms

2024-01-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113534 Bug ID: 113534 Summary: printf might report segmentation fault under -mabi=ms Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Compo

[Bug target/113288] [i386] Missing #define for -mavx10.1-256 and -mavx10.1-512

2024-01-11 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113288 --- Comment #6 from Haochen Jiang --- Fixed on trunk.

[Bug target/113288] [i386] Missing #define for -mavx10.1-256 and -mavx10.1-512

2024-01-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113288 --- Comment #3 from Haochen Jiang --- Adding them are quite straightforward. But I am not quite sure how the whole libgomp patch works. Is the patch attempt to check whether it is a perfect match for each ISA detected from a hardware? If that i

[Bug target/113288] [i386] Missing #define for -mavx10.1-256 and -mavx10.1-512

2024-01-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113288 --- Comment #1 from Haochen Jiang --- (In reply to Tobias Burnus from comment #0) > As noted in > https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642025.html > > There is not #define for -mavx10.1-256 and -mavx10.1-512 > > By contrast,

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2024-01-01 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #11 from Haochen Jiang --- I just checked the code and pattern. I suppose the simple remove is reasonable here. We should only allow x/ymm16+ for scalar instructions, but not this pattern.

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2023-12-28 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #7 from Haochen Jiang --- (In reply to Uroš Bizjak from comment #1) > Created attachment 56962 [details] > Proposed patch > > Patch in testing. > > lowpart_subreg can't handle: > > lowpart_subreg (V4SFmode, operands[0], DFmode); >

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2023-12-28 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #6 from Haochen Jiang --- Aha, I see what happened. x/ymm16+ are usable for AVX512F w/o AVX512VL and that is why I added that to allow them. Let me find a way to see if we can fix this.

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2023-12-28 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #5 from Haochen Jiang --- (In reply to Uroš Bizjak from comment #3) > This patch also fixes the failure: > > --cut here-- > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > index ca6dbf42a6d..cdb9ddc4eb3 100644 > ---

[Bug target/112675] [14 Regression] r14-5385-g0a140730c97087 caused regression on testcases for i386

2023-11-26 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112675 Haochen Jiang changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/112675] New: [14 Regression] r14-5385-g0a140730c97087 caused regression on testcases

2023-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112675 Bug ID: 112675 Summary: [14 Regression] r14-5385-g0a140730c97087 caused regression on testcases Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #24 from Haochen Jiang --- Patch aims to fix that: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/637865.html

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #23 from Haochen Jiang --- I have root caused the issue and also discovered some other minor problems unrelated to this PR but hard to discover. I will write a patch to fix all of them.

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #22 from Haochen Jiang --- A quick workaround would be not appending -mno-avx10.1-xxx into -march=native. And it should work after my experiment. However, I am finding a better way to do that. The real problem seems like the AVX10 a

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