https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65371
--- Comment #4 from Stuart ---
The assembly generated from Comment #1 looks good.
However, the assembly generated from Comment #3 hasn't improved, it still
contains the unnecessary mov instruction on line 2 (mov r2, r3).
The first instruction m
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65371
--- Comment #2 from Stuart ---
I compiled it for x86_64 and thought it was fine, however, after your comment I
tried compiling it with clang/llvm and can see the difference (I'm not
particularly familiar with the full instruction set)...
I've fo
Assignee: unassigned at gcc dot gnu.org
Reporter: gcc-bugzilla at enginuities dot com
Target: arm-none-eabi (Cortex-M3)
I've found this behaviour with gcc 4.8.4, 4.9.2, and 5.0.0 (20150308) (all
compiled with the same flags) on Arch Linux (3.18.2-2-ARCH x86_64).
I&#x
