[Bug target/100348] New: RISC-V extra pointer adjustments for memcpy() from glibc

2021-04-29 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100348 Bug ID: 100348 Summary: RISC-V extra pointer adjustments for memcpy() from glibc Product: gcc Version: 10.2.0 Status: UNCONFIRMED Severity: normal Pr

[Bug tree-optimization/99068] Missed PowerPC lhau optimization

2021-02-16 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99068 --- Comment #9 from Brian Grayson --- If I understand correctly, you're saying that it is sometimes preferred for gcc to avoid update form, but even when the load and addi are next to each other it's possible to use update form, like in the examp

[Bug tree-optimization/99068] Missed PowerPC lhau optimization

2021-02-16 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99068 --- Comment #7 from Brian Grayson --- A single lhau instruction is better than two instructions (lha + addi) for many reasons. Are there reasons that you feel a two-instruction sequence of lha+addi is *superior* to just an lhau? On all PowerPC i

[Bug tree-optimization/99068] Missed PowerPC lhau optimization

2021-02-12 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99068 Brian Grayson changed: What|Removed |Added Resolution|INVALID |--- Status|RESOLVED

[Bug tree-optimization/99068] Missed PowerPC lhau optimization

2021-02-12 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99068 Brian Grayson changed: What|Removed |Added Resolution|INVALID |--- Status|RESOLVED

[Bug target/99068] New: Missed PowerPC lhau optimization

2021-02-10 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99068 Bug ID: 99068 Summary: Missed PowerPC lhau optimization Product: gcc Version: 10.2.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target

[Bug rtl-optimization/99067] New: Missed optimization for induction variable elimination

2021-02-10 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99067 Bug ID: 99067 Summary: Missed optimization for induction variable elimination Product: gcc Version: 10.2.0 Status: UNCONFIRMED Severity: normal Priority: P3 Comp

[Bug target/98981] New: gcc-10.2 for RISC-V has extraneous register moves

2021-02-05 Thread brian.grayson at sifive dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98981 Bug ID: 98981 Summary: gcc-10.2 for RISC-V has extraneous register moves Product: gcc Version: 10.2.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component