[Bug target/120920] RISC-V: Possible optimization of bswap when zbb is enabled

2025-07-17 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120920 --- Comment #4 from Dusan Stojkovic --- Created attachment 61898 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61898&action=edit A hack to always find the real bswap size

[Bug target/120920] RISC-V: Possible optimization of bswap when zbb is enabled

2025-07-17 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120920 --- Comment #3 from Dusan Stojkovic --- Based on Jeff's review, I updated the patch: https://patchwork.sourceware.org/project/gcc/patch/pr3pr08mb5738402789a50779af3ae0abbe...@pr3pr08mb5738.eurprd08.prod.outlook.com/ >> A possibility for improve

[Bug target/120920] New: RISC-V: Possible optimization of bswap when zbb is enabled

2025-07-01 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120920 Bug ID: 120920 Summary: RISC-V: Possible optimization of bswap when zbb is enabled Product: gcc Version: 16.0 Status: UNCONFIRMED Severity: normal Pr

[Bug middle-end/120378] Support narrowing clip idiom

2025-06-24 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120378 Dusan Stojkovic changed: What|Removed |Added CC||dusan.stojko...@rt-rk.com --- Comment

[Bug tree-optimization/119253] RISC-V GCC auto-vectorizes unaligned memory access even if mvector-strict-align is enabled

2025-03-13 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119253 Dusan Stojkovic changed: What|Removed |Added Resolution|INVALID |FIXED --- Comment #2 from Dusan Stojk

[Bug tree-optimization/119253] New: RISC-V GCC auto-vectorizes unaligned memory access even if mvector-strict-align is enabled

2025-03-12 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119253 Bug ID: 119253 Summary: RISC-V GCC auto-vectorizes unaligned memory access even if mvector-strict-align is enabled Product: gcc Version: 15.0 Status: UNCONFIRMED

[Bug target/116425] RISC-V missed optimization: vector lowering along lmul boundaries

2024-10-21 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116425 Dusan Stojkovic changed: What|Removed |Added CC||dusan.stojko...@rt-rk.com --- Comment

[Bug tree-optimization/116766] New: Missed loop vectorization case with gather/scatter

2024-09-18 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116766 Bug ID: 116766 Summary: Missed loop vectorization case with gather/scatter Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Componen

[Bug target/113035] RISC-V: regression testsuite errors -mtune=sifive-7-series

2024-08-14 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113035 --- Comment #3 from Dusan Stojkovic --- Upon further investigation into the bug related to the vsetvl-*.c tests (specifically vsetvl-13.c, vsetvl-15.c, and vsetvl-23.c), we found the following: When using the mtune=sifive-7-series tuning, tests

[Bug target/113035] RISC-V: regression testsuite errors -mtune=sifive-7-series

2024-08-09 Thread Dusan.Stojkovic--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113035 Dusan Stojkovic changed: What|Removed |Added CC||dusan.stojko...@rt-rk.com --- Comment