about auto-vectorization and run time stack align

Hi all: Recently I found some tricky bugs in a private target which supports SIMD instructions. The reason is auto-vectorization will try to use those SIMD instructions which require data address be 32 bytes aligned. So a target specific option, which enable generating runtime stac

Re: how can I split 1 mov insn into 2 sub_mov and 1 combine?

define_split should be the correct way to handle this. You should first use define_split to break your 256bit pattern and generate legitimized 128bit rtl pattern sequence for you processor mips_output_move should only be used to handle those legitimized one. 256 bit rtl pattern > define

Re: avr compilation

This may related with subreg regmove finding Suggest specifiy -fdump-rtl-regmove to see what happen after this pass Maybe avr need a target dependent regmove pass to handle this Best, Jiong On 03/18/2011 04:47 PM, Paulo J. Matos wrote: Hi all, I am looking at the avr backend in order to try t

Re: How can I write a builtin func?

On 12/10/2010 02:17 PM, Liu wrote: Hi all, I'm porting gcc to a MIPS-based DSP, I need write some builtin func for some insns, but I can't find a doc., any one should help me? Show me a example please? Thanks very much. Liu. Maybe you should at least implement the following two hooks