RE: Question about "instruction merge" pass when optimizing for size

2015-08-19 Thread Robert Suchanek
(It appears I accidentally dropped the mailing list) Hi, > On 08/19/2015 02:38 PM, DJ Delorie wrote: > > I've seen this on other targets too, sometimes so bad I write a quick > > target-specific "stupid move optimizer" pass to clean it up. > > > > A generic pass would be much harder, but very use

RE: ICE in bitmap routines with LRA and inline assembly language

2014-09-08 Thread Robert Suchanek
ard_regs; reg != NULL; reg = reg->next) if (reg->type == OP_OUT && reg->early_clobber && ! reg->subreg_p) > -Original Message----- > From: Steve Ellcey > Sent: 05 September 2014 22:49 > To: Vladimir Makarov > Cc: Robert Suchanek > Subject: Re

Introducing a nanoMIPS port for GCC

2018-05-02 Thread Robert Suchanek
mbler. It controls out-of-range call optimization through trampoline stubs. It is enabled by default when optimizing for size. Note that support for 64-bit and floating-point is not finalized and still unofficial. GCC contributors - nanoMIPS port, ABI, code and data models, TLS, b

LRA: check_rtl modifies RTL instruction stream

2013-11-08 Thread Robert Suchanek
rtl does not modify the insns? The back end issue will be looked separately by us. The testcase compiled with -mips64 -mabi=64 -mips16 -msoft-float with LRA enabled: char a[10]; char foo () { return a[2]; } Regards, Robert Suchanek