Hello,
I have ported gcc to a 16-bit target. Now problem is, gcc generates wrong code
with -O1 and above optimization for move and load/store instructions, b using
the 32-bit registers with 16-bit instructions. For ex:
===
move r13, r1 // move 0-15 bit to r1 register
move r13, r0 // move 16-31
To solve the above issue, can I use the "define_peephole2" insn pattern?
No. At most you could abuse it to hide the issue some of the time.
You probably have one or more of your target macros / hooks wrong,
e.g. HARD_REGNO_NREGS.
Thank you very much for your reply. In my case, code generation
--- Begin Message ---
Hi Joseph,
> The following target architectures have seen no test results posted in
> the past year: arc, c4x (as listed above), crx, iq2000, mt, pdp11,
> score, stormy16, vax.
Please do not deprecate the "crx" target. We are actively working on to update
this target and
Hello,
I am trying the build the crx-elf target gcc compiler tools from gcc trunk
sources, but the below error message displayed.
Could any one suggest the reason for build fail?
===Error log
In file included from /trunk/gcc/sel-sched-dump.c:37:
/trunk/gcc/sel-sched-ir.h:93: error: ex
Hello,
I am building the gcc tools using the gcc trunk sources and my configuration is:
=
/gcc/trunk/configure --build=i686-pc-linux-gnu --host=i686-pc-mingw32
--prefix=/release --target=crx-elf --disable-nls --enable-languages=c,c++
--disable-libssp --with-mpfr=/scratch/mpfr-2.3.1/rel --with-
Hello,
I am trying to build the gcc tools on cygwin host. But the build failed with
below errors:
$ gcc -I../../../trunk/libdecnumber -I. -g -O2 -W -Wall -Wwrite-strings -Wstr
ict-prototypes -Wmissing-prototypes -Wold-style-definition -Wmissing-format-att
ribute -Wcast-qual -pedantic -Wn