Devang Patel wrote:
On Apr 18, 2005, at 6:29 PM, James E Wilson wrote:
I notice that these are pedwarns,
In that case, we can enable it only when -pedantic is used (like many
pedwarns) ?
Consider this small modification to your testcase.
const char *a( void )
{
return "abc";
}
int
Øyvind Harboe wrote:
How does the i386 backend optimise the stack slot assignment to minimize
the displacement offset?
We don't. We just assign sequential addresses as we allocate stack slots.
; -O0 => large offset
leal8268(%esp), %eax
incl(%eax)
; -O3 => small offset
Øyvind Harboe wrote:
The external functions in my example using the arrays ensures that the
arrays are not optimized away.
Ah, right, stupid mistake on my part.
The registers that are spilled are allocated place in the stack frame
last, so when FRAME_GROWS_DOWNWARD, the displacement offsets are
sma
Martin Koegler wrote:
> Placing variables in a specfic section is only a part of the problem.
I am aware of that. There are already many targets that have special
handling for section attributes, that result in different code being
generated when a section attribute is present. Mostly these hav
Daniel Towner wrote:
This no longer appears to be the case? `assemble_name' is still called
with `fn', and correctly marks `fn' as being referenced, but no body is
ever emitted.
-fno-unit-at-a-time might help. This disables some of the cgraph
optimizations. This will probably go away eventuall
Joern RENNECKE wrote:
required for Tal16bool. Should we enforce that any storage element
allocated
for a run of ms-bitfields get the full alignment of the basetype, even
when it exceeds
the size of the basetype and of BIGGEST_ALIGNMENT?
Obviously, we should do the exact same thing that the micro
Björn Haase wrote:
The mid-end seems not to be able to simplify nested subreg expressions. I.e.
it seems that there is no known transformation
(subreg:QI (subreg:HI (reg:SI xx) 0) 0)
Nested subregs aren't valid. You should refrain from creating them.
(define_expand "xorhi3"
[(set (subreg:QI
Denis Vlasenko wrote:
Yes. wp512_process_buffer() was using 3k of stack if compiled with -O2.
The wp512.c I appended (sans table at top) is instrumented to show it.
Use "make crypto/wp512.s".
See
http://gcc.gnu.org/bugs.html
for info on reporting gcc bugs.
We need a testcase that we can use to
Zhenyu Guo wrote:
0x4720 : [BBB] nop.b 0x0
0x4721 : (p08)
br.cond.dpnt.few 0x4740
0x4722 :
br.call.sptk.many b0=0x4720 ;;
Most likely this means that you are looking at unlinked (i.e.
unrelocated) code. Did you r
Zhenyu Guo wrote:
> gcc --static test.c -o test
Hmm, it turns out that the code really does do that. This had me
puzzled for a bit until I remembered that a weak function call would
look like this. This would have been easier if I had the source code to
look at, but I couldn't find gmon_initiali
Greg McGary wrote:
I found that
emit_no_conflict_block() reordered insns gen'd by
expand_doubleword_shift() in a way that violated dependency between
compares and associated conditional-move insns that had the target
register as destination.
You didn't say precisely what went wrong, but I'd guess y
Paul Schlie wrote:
- Might it be possible to introduce and use by convention a new macro which
will always wrap a new pointer in a mem expression with attributes copied
from the previous mem/symbol's reference enforced?
This is already an easy function call. I don't see how adding a macro
mak
Björn Haase wrote:
So far, I now think that the solution of the issue would be to extend
gen_lowpart and gen_highpart so that they are able to handle also subreg
inputs and use them at all places that emmit RTL (i.e. expand and split).
Question is whether I should try to simultaneously implement
Martin Koegler wrote:
arg 1 >>
So, how to change this function? As a MEM_EXPR may only be a DECL or a
COMPONENT_REF,
storing a indriect_ref of a plus_expr is also not valid. This is, why I had to
change
the other functions.
There is a var_decl here inside the indirect_ref. Will using
Andrew Pinski wrote:
Does anyone read the installation instructions?
Yes, but not everyone. And even people that read the docs can miss the
info if they can't figure out which part of the docs they are supposed
to be looking at.
If you don't want people sending bug reports like this, then you i
On Fri, 2005-04-22 at 15:56, Paul Schlie wrote:
> - Why are string literal character arrays not constructed and expanded as
> character array literals are?
They are constructed and expanded differently, because, obviously, they
are different things. I don't understand the point of this question
Sebastian Biallas wrote:
But I noticed some smaller optimization issues on x86, and on of them is
a regression to gcc 3.3 so I'm reporting this here. Accept my apologies
if this is already known, but I think it's worth noting.
You can submit optimization regressions into our bugzilla bug database.
On Fri, 2005-04-22 at 04:58, Paul Schlie wrote:
> Thanks. After going through the code, it's even further not clear why
> STRING_CST string literal data references treated differently than
> static const char array literal data references to begin with?
> Why is this necessary?
Why is what necessa
Ling-hua Tseng wrote:
(Does (high:SI ...) have the semantic of clearing LSB 16-bit ? )
Storing an SImode value into an SImode reg will set the entire register,
unless you are using subreg/zero_extract/etc on the destination. So
yes, this will clear the low order bits, where the number of
Sebastian Biallas wrote:
You don't need to reserve a stack slot for the return address on x86.
The stack slot will be allocated implicitly by the "call" instruction.
OK, then this must be a similar issue to the register saves in the
prologue. There is confusion between calculating the frame size,
Björn Haase wrote:
misses therefore a lot of optimizations. I am presently trying to remove the
define_insn for the HImode and SImode operations by implementing the lowering
to QImode at expand or at least after reload (for those operations that leave
the condition code in a useable state like a
Don Lindsay wrote:
fatal: libiconv.so.2: open failed: No such file
You have a copy of GNU iconv in /usr/local. This is apparently a common
problem with Solaris.
http://gcc.gnu.org/ml/gcc/2005-04/msg01092.html
http://gcc.gnu.org/ml/gcc/2005-04/msg01030.html
give two possible solutions to
Greg McGary wrote:
That will do fine for ports that have conditional move, but without
movsicc, you'll have this case:
cmpsi ...
bcc 1f
movsi target, ...
1:
cmpsi ...
bcc 2f
movsi target, ...
2:
Thanks for the additional details. I had to remind myself what
emit_n
Gang-Ryung Uh wrote:
Could anyone help me understand what is the gcc
strategy to prepare the stack frame?
You didn't mention the gcc version, or the gcc target. Different gcc
versions and targets will give different answers. Even different x86
targets work differently.
printf("0x%x=return a
Rajkishore Barik wrote:
./mul_mdmd_md.c:343: error: unable to find a register to spill in class
âAD_REGSâ
Compile with -da, look at the .greg dump file, it will have a bunch of
messages saying "reloads for insn ...". Find the one for the insn that
is failing. Look at the .lreg dump to find the
Zhenyu Guo wrote:
Any bechmarks which are dynamic storage alloca intensive? Or
call malloc like func a lot?
gcc makes a nice benchmark, and has lots of allocation calls.
Otherwise, this doesn't seem to be a gcc question.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com
zouq wrote:
> i am now writing a frontend in gcc, but i don`t understand the rule
> to write the makefile.in, config-lang.in
There is a section in the docs that describe config-lang.in. Try
looking at it. Also, try looking at the config-lang.in files for other
language front ends.
As for makefi
Bryan Richter wrote:
Can someone assist me in getting the necessary copyright assignment
forms?
See
http://gcc.gnu.org/ml/gcc/2003-06/msg02298.html
for info on how to get the process started.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com
Gary Funck wrote:
(call_insn 84 66 141 (call_placeholder 77 67 0 0 (call_insn 83 82 0 (parallel [
call_placeholder is a special kind of RTL. It contains 3 instruction
sequences for the 3 different possible kinds of calls: a normal call, a
tail call, and a sibling call. These aren't printed in t
Sergei Tovpeko wrote:
Is there any util that would produce result containing the asm code
execution staticstics ???
I assume you want assembly instruction execution counts. You could
produce this info from gcov with a bit of work, as gcov already gives
you execution counts for basic blocks. You
William S Fulton wrote:
test.cxx:15: warning: non-local variable ‘::
::Instance’ uses anonymous type
Just grepping the sources for the warning, I find this comment
/* [basic.link]: A name with no linkage (notably, the name of a class
or enumeration declared in a local scope) shall n
Martin Koegler wrote:
The fix is quite simple and was included in the bug report about 4 month ago.
I raised also this issue on gcc-patches
(http://gcc.gnu.org/ml/gcc-patches/2004-12/msg01390.html),
but the problem still remains in the mainline cvs version.
What can I do, to get the fix in the CVS
On Tue, 2005-04-26 at 01:57, Sergei Tovpeko wrote:
> Does it mean that GCOV have much more data (in its binary format)
> but don't treat them and out to user in human format?
We have branch taken/not-taken counts, and from that, we can compute
basic block execution counts and branch probabilities.
Øystein Johansen wrote:
But why is the /gcc4.1/include/ directory empty?
I think if you build only the C compiler, and your target doesn't
support mudflap, then you won't get any files here. This is because the
C compiler doesn't have anything to put there. Otherwise, there will be
files here.
Martin Koegler wrote:
typedef struct x ax __attribute__ ((eeprom));
void test1(ax* x)
One possible solution is to change your syntax. eeprom is supposed to
be an attribute that applies to a decl. You are using a trick here to
apply it to a type via a typedef, which takes advantage of the fact t
Andrew Haley wrote:
* postreload-gcse.c (hash_scan_set): Removve bogus assertion.
I agree with Roger here, we need to add code to handle REG_EG_REGION
notes here instead of just dropping the gcc_assert call. See my 2 week
old message on the gcc list when this first came up
http://gcc.gnu.or
Devang Patel wrote:
* dbxout.c (dbxout_type): Emit attribute vector.
You are setting have_used_extensions without first checking
use_gnu_debug_info_extensions, which is wrong. If you look at the code,
you will see that this idiom is used everywhere in dbxout.c.
Bootstrapped and tested o
Paul Woegerer wrote:
two weeks ago i've posted a new port to gcc-patches and it seems
that no global maintainer took a look at it so far. Maybe now that
the 4.0 is released there is someone who can take a look at it :)
I should be able to help with this if no one else can, as I am trying to
review
Jean-Paul Rigault wrote:
- I had to use the --enable-languages option to get the Ada compiler;
without it, and contrarily to what is suggested in the installation doc,
Ada was not built.
- the HTML documentation is generated in /objdir//gcc/HTML, not in
/objdir//HTML as indicated in the document
On Wed, 2005-04-27 at 12:53, Mike Stump wrote:
> Yes, this is ok. One final nit, if you'd like to fix it as well, is
> that obj-c++ should be added as a non-default language:
Good catch. I fixed that in my patch.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com
On Wed, 2005-04-27 at 02:44, Andrew Haley wrote:
> Well, of course I'm not going to disagree with you, but I removed the
> assertion because it totally broke the Java front end.
That means you traded a visible compile time error for a possible silent
run-time error. That sounds like a poor trade
Matt Thomas wrote:
I like the more and simplier patterns approach but I'm wondering what
the general recommendation is?
If an optimization pass will re-recog after rewriting an insn, then it
is OK to have two separate patterns for two separate assembly insns.
Otherwise, the optimization pass will
David Gressett wrote:
The attempt to make HTML documentation crashes:
make[1]: Entering directory `/home/jdg/gccbuild/i686-pc-linux-gnu/libada'
make[1]: *** No rule to make target `html'. Stop.
make[1]: Leaving directory `/home/jdg/gccbuild/i686-pc-linux-gnu/libada'
make: *** [html-target-libada]
Amir Fuhrmann wrote:
../gcc-3.4.3/configure --exec-prefix=/usr/local --program-prefix=ppc-
--with-stabs -with-cpu=603 --target=powerpc-eabi --with-gnu-as=ppc-as
--with-gnu-ld=ppc-ld --enable-languages=c,c++
Try adding --with-newlib. You either have to use a combined tree so
that newlib will be a
zouq wrote:
> i found madd instruction in mips.md, but why when i compiled it with
> my cross-compile mipsel-linux-gcc as follows, mipsel-linux-gcc -mips4
> -O2 test.c -S i can`t find any madd instruction in test.s??
Basic questions like this are really more appropriate for the gcc-help
list. The
Amir Fuhrmann wrote:
checking whether byte ordering is bigendian... cross-compiling...
unknown
checking to probe for byte ordering... /usr/local/powerpc-eabi/bin/ld: warning:
cannot find entry symbol _start; defaulting to 01800074
Looking at libiberty configure, I see it first tries to get the
by
On Fri, 2005-04-29 at 17:29, Amir Fuhrmann wrote:
> 1. If I am ONLY interested in the compiler, and do NOT want to build
> libraries, what would be the process ??
"make all-gcc" will build just the compiler without the libraries.
> 2. I looked at newlib, but wasn't sure of the process of includin
Dimitri Papadopoulos-Orfanos wrote:
As far as I can understand, it's not possible to build gcc 4.0.0 and gcc
3.4.* using GNU binutils with current release 2.15 of GNU binutils. One
has to use the CVS sources or at least one file.
FYI binutils-2.16 has just been released. You might want to try th
Satendra Pratap wrote:
I am using a cross compiler "sparclet-aout-gcc". I have written my own
main function and does not link to libgcc's main function while
linking is done. I m not able to initialize the global objects The
generated executable format is "a.out".
You have so much modified stuff he
Anuradha Suraparaju wrote:
My question is how do I report this as a bug? What information do I
need to provide in the bug report? Did anybody else face similar
problems with GCC-4.0.0 and MMX-enabled programs.
See
http://gcc.gnu.org/bugs.html
for info on reporting bugs.
If you can narrow this d
Jonathan Bastien-Filiatrault wrote:
* We have defined BIT_PER_WORD to 16 and UNITS_PER_WORD to 1. On this
DSP, there are two 40-bits accumulators. How do we make GCC take
advantage of this and which machine mode do we use ?
GCC has little support for non-power-of-2 sized accumulators.
Traditionall
Martin Koegler wrote:
I notice, that your last change in function.c forgets virtual
registers in the RTL in some conditions. In older version (the last I used was
20050412),
this has not happend.
Patches should go to gcc-patches instead of the gcc list.
If you want us to continue accepting patches
Kai Ruottu wrote:
GCC configure. But there are long-standing bugs in the GCC sources and
workarounds/fixes are required.
Since you seem to have an understanding of the problems here, perhaps
you could file some bugzilla bug reports to document them.
then not... As told the "eabi" is not and one
On Wed, 2005-05-04 at 06:00, Paul Koning wrote:
> I wonder if the work-in-progress PDP10 port
> (http://pdp10.nocrew.org/gcc/) might help with this.
Interesting, but a hobbyist port for a 36-bit machine that was
end-of-lifed about 2 decades ago has little chance of success, unless
there are some v
On Wed, 2005-05-04 at 09:37, Anuradha Suraparaju wrote:
> I've attached a sample file to this email. The class defined in the cpp
> file is a cut down and modfied version of the class used in Dirac.
That is a fine bug report. You just need to put it in bugzilla if you
want us to do anything about
Jeroen Dobbelaere wrote:
void test_2(unsigned long* __restrict__ bar, char* __restrict__ bas)
{
unsigned long tmp = *bar;
*bas = 0;
*bar = tmp;
}
The optimization in the first example happens in the postreload cse
pass, and is relying on RTL alias analysis info.
The optimization does not ha
On Wed, 2005-05-04 at 14:27, Jeroen Dobbelaere wrote:
> Is this correct ?
I was only trying to explain how gcc works for the one example that you
posted. I was not trying to explain precise semantics of how restrict
works according to the ISO C standard, and my message should not be
construed as
On Wed, 2005-05-04 at 16:24, Jeroen Dobbelaere wrote:
> I'm aware of that. The reason are asked for more clarity is that I
> think gcc should
> do better (as in the example I gave), but I want to be sure that this
> is still allowed
> by the standard.
Certainly gcc can and should do better, and th
On Sat, 2005-05-07 at 10:22, Eric Botcazou wrote:
> > Apparently this problem only shows up for x86 when using Sun tools, but
> > when using GNU tools, it also shows up for sparc.
> Do you have a testcase? AFAIK the problem only shows up with the Sun tools.
I meant when using GCC with the Sun ass
Daniel Berlin wrote:
A bunch of random code #ifdef KEY'd
FYI Pathscale was formerly known as Key Research. So the KEY probably
wouldn't mean anything special here, it is likely just a marker for
local changes.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com
Steven Bosscher wrote:
Are predicate checks free, or should there be some post-pass to
clean up this kind of useless predication?
On IA-64, predicate checks are free in terms of run-time. There is the
problem that unnecessary predicate checks might increase register
lifetimes, causing extra
Andrey Belevantsev wrote:
We've also found that current mainline ICEs compiling the testcase with
"-O0 -fschedule-insns -fschedule-insns2".
I suspect this is a bug in ia64_reorg in ia64.c. It shouldn't be trying
to schedule during a non-optimizing compile. So the line
if (ia64_flag_schedu
Vladimir Makarov wrote:
I just hope results
for 64-bit mode, amd machine, or SPECFP2000 are better.
Their web pages primarily talk about the 64-bit performance on AMD
systems. Maybe they aren't well tuned for 32-bit performance and/or
Intel parts. Anyways, from what Daniel Berlin mentioned,
Gunther Nikl wrote:
A few LINK_SPEC definitions contain a "%{Wl,*:%*}" sequence.
There is no need to match -Wl options in LINK_SPEC, as it is handled by
the gcc.c driver. The driver support was added in gcc-2.5.8. I believe
all of these LINK_SPEC checks for -Wl are obsolete code from gcc-2.
Eric Botcazou wrote:
The HP-UX port on the IA-64 architecture defines the MEMBER_TYPE_FORCES_BLK
macro with this comment:
Steve Ellcey defined MEMBER_TYPE_FORCES_BLK when he first implemented
the ia64-hpux port. At the time, I mentioned using PARALLELs was a
better solution, but this was a s
Sergei Organov wrote:
-and functions are removed. This may result in undefined references
+and functions. This may result in undefined references
Thanks. I checked in the patch.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com
DJ Delorie wrote:
For some chips, like xstormy16 and m16c, function pointers are wider
than other pointers.
Trying to fake two kinds of pointers when we only have one doesn't seem
wise to me.
A possible solution is to use function descriptors. See FDESC_EXPR and
ASM_OUTPUT_FDESC. So now w
Martin Koegler wrote:
I continued to work on the support for named address spaces in GCC.
This does look like a good start.
An possible issue is the effect on gcc memory usage and compile time. I
see you increased the size of MEM rtl which will increase memory usage.
Also, there seem to be
Mike Stump wrote:
In defaults.h, they do:
/* This is how to output an element of a case-vector that is absolute.
Some targets don't use this, but we have to define it anyway. */
#ifndef ASM_OUTPUT_ADDR_VEC_ELT
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
This was added before gcc-2.3.3.
On Sun, 2005-07-03 at 09:13, Steve Ellcey wrote:
> I believe that, if MEMBER_TYPE_FORCES_BLK is not defined, this code will
> change the mode of a structure containing a single field from BLKmode
> into the mode of the field.
This is why we should be checking types in ia64_function_arg instead of
Stephen Torri wrote:
I am interested in reading the actual grammar files used for parsing C
and C++ programming languages inside gcc. Where are these files located?
See cp/parser.c for the C++ parser. The c-parse files are only for C
and Objective-C.
--
Jim Wilson, GNU Tools Support, http://
James Kosin wrote:
I'm having problems with building a release.
~make -C gcc gnatlib-shared
http://support.intcomgrp.com/mirror/fedora-core/beta/src/gcc-3.3.6-1.fc1.src.rpm
Neither FC1 nor gcc-3.3 are supported products anymore.
The problem seems to be that ar needs to load the rts/adaint
On Sun, 2005-07-03 at 07:31, Martin Koegler wrote:
> * need to rewrite recursivly each element of type (which my contain
> structures,
> unions, ...) if a address space is set
> In http://gcc.gnu.org/ml/gcc/2005-04/msg01438.html, this was rated as bad
> idea.
It is possible I was wrong. Co
On Thu, 2005-07-07 at 05:02, Eric Botcazou wrote:
> * config/ia64/hpux.h (MEMBER_TYPE_FORCES_BLK): Only force
> TFmode to BLKmode.
> * config/ia64/ia64.c (force_general_reg): New function.
> (ia64_function_arg): Pass the argument in general regs
> if force_general_reg
Liu Haibin wrote:
(match_operand:SI 2 "register_operand" "r")
But the problem is it uses normal register, like r8, r9. How can I
write the define_peephole2 so that it uses custom registers?
See the "Constraints" section of the documentation. "r" means a general
reg
Liu Haibin wrote:
to "c". However, it seems very difficult here. The old insn patterns
are all general registers, but the new insn patterns are defined as
custom registers.
The peephole pass does not do register allocation. So you can't use it
to magically change "r" registers to "c" register
How about something like
this?
--
Jim Wilson, GNU Tools Support, http://www.specifix.com
2005-07-28 James E Wilson <[EMAIL PROTECTED]>
* doc/invoke.texi (Wstrict-aliasing=2): Reword.
Index: invoke.texi
===
RCS file: /cvs
Mark Cuss wrote:
[EMAIL PROTECTED] helloworldsun]$ g++ -b sparc-sun-solaris2.9 hello.cxx
/cdl/apps/.software/linux/gcc-3.4.4-x86-sparc/lib/gcc/sparc-sun-solaris2.9/3.4.4/../../../../sparc-sun-solaris2.9/bin/ld:
values-Xa.o: No such file: No such file or directory
collect2: ld returned 1 exit st
On Thu, 2005-07-28 at 12:48, David Daney wrote:
> Also you can see that neither hello-world.o nor my libc-2.3.3.so have
> any undefined symbols that would be satisfied by libgcc_s.so.
It looks like you forgot to check the crt*.o files for undefined
references.
If the gcc/glibc toolchain wasn't b
David Daney wrote:
Recently we experienced the Big-Classpath-Merge. Now most of the source
code for libgcj is maintained in the Classpath project and periodically
copied into the GCC CVS repository.
Appropriate info should be added here:
http://gcc.gnu.org/codingconventions.html#upstream
On Thu, 2005-07-28 at 16:58, Greg Schafer wrote:
> Glibc headers ARE provided -> inhibit_libc NOT defined -> optimal
> Glibc headers ARE NOT provided -> inhibit_libc IS defined -> suboptimal
This is basically what I meant, but I don't want to get in a debate
about what is optimal and what isn't
Ioannis E. Venetis wrote:
I found that a comment for bug 13756
mentions the missing documentation for -ftree-dse
Should I still create a new bug report?
No. Since we already have one, we don't need another one.
--
Jim Wilson, GNU Tools Support, http://www.specifix.com
[EMAIL PROTECTED] wrote:
I guess the combiner generates something like
a trucation pattern when special constant are detected.
The combiner also takse a similiar action in pattern
See the section of the documentation that talks about instruction
canonicalization.
http://gcc.gnu.org/online
[EMAIL PROTECTED] wrote:
Recently I tried to install mpich-1.2.7 with gfortran (gcc-4.0.1) on a fedora
core 4 (x86_64) :
The configure for mpich fails for fortran, because getarg and iargc are missing.
Now my question, g77 supported a lot of commonly used service routines, which
are now missing
Jack Howarth wrote:
In compiling xplor-nih under the gcc/g++ of 4.1 branch instead
of Apple's gcc/g++ 4.0 compilers from Xcode 2.1, I noticed that the
gnu gcc compiler doesn't gracefully handle the -bundle flag. On Apple's
compiler I can have a Makefile entry like...
This is PR 21366.
Yo
Tabony, Charles wrote:
How can I
distinguish recognized from unrecognized insns in ASM_OUTPUT_OPCODE?
Try using the variable this_is_asm_operands.
ASM_OUTPUT_OPCODE is an old macro that doesn't get used much anymore.
FINAL_PRESCAN_INSN is better if you can use it. No recog_data.operand
tric
On Thu, 2005-08-04 at 05:41, Peter O'Gorman wrote:
> + trying to interpret the rest of the command line.
> + Use heuristic that all copnfiguration names must have at least
> + one dash '-'. This allows us to pass options starting with -b. */
There is a typo here copnfiguration->confi
Christian Joensson wrote:
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1plus-checksum.o differs
what does that mean?? the compare passes... and the build continues...
The checksums are used for PCH validatation. We generate md5 checksums
for each cc1 bin
On Thu, 2005-08-04 at 20:54, Peter O'Gorman wrote:
> 2005-08-?? Peter O'Gorman <[EMAIL PROTECTED]>
> PR 21366
> * gcc.c (process_command): Check the argument to -b has a dash.
> * doc/invoke.texi: Update -b and -V docs.
I checked in the patch.
--
Jim Wilson, GNU Tools Support,
Jerome Guitton wrote:
Two solutions : we can either change the tree code to CHAR_TYPE or add a test
to detect Ada character types in the INTEGER_TYPE case, like it is done for
C:
...
The first solution would probably be cleaner, but it would mean that
Ada would be the only supported langage to us
Andrew Haley wrote:
Tom Tromey writes:
> I was under the impression that CHAR_TYPE was deprecated, so I
> purposely avoided it in gcjx. I'm not sure where I got that
> impression though.
I can't remember the context either, but I agree with your memory. I
think it was discussed a little whil
Paul Brook wrote:
We already have TYPE_STRING_FLAG used on array types. Maybe it would it make
sense to use that?
That sounds like an excellent choice. dbxout.c and dwarf2out.c already
check TYPE_STRING_FLAG to distinguish strings from arrays.
--
Jim Wilson, GNU Tools Support, http://www.spe
imes creep back in.
See for instance the following ChangeLog entries in the toplevel
ChangeLog file
2004-04-15 James E Wilson <[EMAIL PROTECTED]>
2004-05-25 Daniel Jacobowitz <[EMAIL PROTECTED]>
--
Jim Wilson, GNU Tools Support, http://www.specifix.com
Kevin McBride wrote:
I have been having comparison errors while building a native 4.0.1
compiler for my Fedora Core 4 system.
Running
cmp c-pragma.o stage2/c-pragma.o
on your provided files says that they identical. If you are getting
comparison failures on these files, then perhaps your "c
Ling-hua Tseng wrote:
> Are there any ways to tell GCC that don't group an jump_insn with
> other insns when structural hazard occured?
Probably multiple ways, depending on what exactly the problem is.
I'd suggest using -da -fsched-verbose=2 and looking at the scheduling
info printed in the sched
Torsten Mohr wrote:
configure: WARNING: No native atomic operations are provided for this \
platform.
configure: WARNING: They cannot be faked when thread support is disabled.
configure: WARNING: Thread-safety of certain classes is not guaranteed.
These are just warnings, and won't stop the bui
F. Heitkamp wrote:
> ../../gcc-cvs-3-3/gcc//gcc/unwind-dw2.c -o libgcc/./unwind-dw2.o
> /tmp/ccNkOiHW.s: Assembler messages:
> /tmp/ccNkOiHW.s:3142: Error: Unrecognized opcode: `stvx'
You didn't mention the binutils version or how it was configured. It
appears that it isn't completely compatible
Vijaya Kishore Idimadakala wrote:
> ../configure --with-cpu=PowerPC. And it is giving me
> an error during make saying
> "Unknown CPU given in --with-cpu=PowerPC"
gcc-help is a more appropriate place for beginner questions. Try
reading the documentation, e.g.
http://gcc.gnu.org/install/configure.
Daniel Towner wrote:
> register renaming is able to change the registers used by the function
> from callee-save to caller-save, removing any need for the
> save/restore/stack adjust code in the prologue/epilogue. However, the
> instructions which perform these operations are still emitted.
I doub
Balaji V. Iyer wrote:
> Pass this "live/not-live" flag to the register allocation process so that
> it can output instruction in such a way (please see example below) (I want
> this information to be passed into .md stage)
You can't get cycle-accurate life time info in the register allocator
unles
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