[Question, C6X] Under what situations should we disable DCE in sched2?

Hello, I find DCE in sched2 is disabled for C6X backend. Is this a performance consideration? Or a GCC BUG? And under what situations should we disable DCE in sched2? Can anyone explain this? Many thanks. The code snippet: static void c6x_reorg (void) { basic_block bb; rtx *call_

[Question, IRA] Different IRA behaviour with the same RTL input but trivially different CFG

Hi Vladmir, I think that IRA should give the same result with the same RTL input. But I find that this is not always true. I test IRA with two inputs, say X and Y. The RTL insns are the same (ignore the UIDs). And the only difference between the two is the CFG. There are two blocks in