Hello,
I'm currently writing a gcc 4.4.5 backend for an 18 bit architecture.
I have a c-project with some thousand lines of code. Without optimizations it
compiles. But with -O1 and -O2 I encounter a problem in the induction variables
optimization pass.
The main issue is, that a temporary
Hello,
I'm currently writing a gcc backend for a microcontroller architecture which
can only handle indirect memory accesses.
In normal cases all works fine, but there is a special case where the reload
pass (<- not sure) produces a direct memory access in -O2 optimization mode
which causes the
Hello,
I have some trouble dealing with delay slots. The problem is that our
architecture can't handle branch instructions using registers which have been
changed in the previous instruction. So a delay slot is needed.
The difficult part is, that this delay slot is only needed if the same regist
Hello gcc gurus,
I have a problem with jumps. Our architecture can only handle 13bit direct
jumps and 18 bit indirect jumps. Sometimes those 13bit are not enough and I
want to give the user the possibility to force jumps to be indirect jumps.
Somehow I was not able to find a way to do so. The m