On 06/15/2010 11:02 AM, Paulo J. Matos wrote:
Just noticed the following also in optabs.c:
/* We can't do it with an insn, so use a library call. But first ensure
that the mode of TO is at least as wide as SImode, since those are the
only library calls we know about. */
if (
Hello,
Currently gcc (at least version 4.5.0) does a very poor job generating single
precision floating point code for ARM Cortex-A8.
The source of this problem is the use of VFP instructions which are run on a
slow nonpipelined VFP Lite unit in Cortex-A8. Even turning on RunFast mode
(flush d
On Wed, Jun 16, 2010 at 5:52 PM, Siarhei Siamashka
wrote:
> Hello,
>
> Currently gcc (at least version 4.5.0) does a very poor job generating single
> precision floating point code for ARM Cortex-A8.
>
> The source of this problem is the use of VFP instructions which are run on a
> slow nonpipelin
Sent from my iPhone
On Jun 16, 2010, at 6:04 AM, Richard Guenther > wrote:
On Wed, Jun 16, 2010 at 5:52 PM, Siarhei Siamashka
wrote:
Hello,
Currently gcc (at least version 4.5.0) does a very poor job
generating single
precision floating point code for ARM Cortex-A8.
The source of this
Hi Diego,
Thanks a lot for doing this! I was a bit sad not to be able to continue
this work on pass selection and reordering but I would really like to see GCC
pass
manager improved in the future. I also forwarded your email to the cTuning
mailing list
in case some of the ICI/MILEPOST GCC/cTuni
On Wed, 2010-06-16 at 15:52 +, Siarhei Siamashka wrote:
> Hello,
>
> Currently gcc (at least version 4.5.0) does a very poor job generating single
> precision floating point code for ARM Cortex-A8.
>
> The source of this problem is the use of VFP instructions which are run on a
> slow nonp
The final version of DWARF Version 4 is available
for download from http://dwarfstd.org.
--
Michael Eagerea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Are there any plans to make GCC and/or GAS emit the version 4 variants of
the .debug_line and/or .debug_frame formats?
The .debug_line version 4 format only adds the "maximum operations per
instruction" header field and associated logic, which is only meaningful
for VLIW machines (i.e. ia64--are t
