tter suited in this group)
>
> --
> PMatos
>
>
>
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On 18/10/11 06:12, vikramsp wrote:
In my .md file there is an insn
(define_insn abssf2
(clobber (match_scratch 2 ""))
the %2 register is allocated as r0 in the real code.
My problem is that i want other than r0 to be allocated
for operand 2.
Please help how to do t
in context:
http://old.nabble.com/register-allocation-in-gcc-tp32672242p32672242.html
Sent from the gcc - Dev mailing list archive at Nabble.com.
Hi Nathan,
> I guess
> it must be to do with function calling
Good call. I screwed up the conversion from FUNCTION_ARG_PARTIAL_NREGS to
TARGET_ARG_PARTIAL_BYTES.
Cheers,
Jon
Nathan Sidwell wrote:
Jon Beniston wrote:
Hi,
I'm updating a GCC port to 4.0.0. I am seeing a problem whereby registers
that are set to 1 in fixed_regs are being used. The problem is occuring
quite early on in the compiler, as the registers appear in the 00.expand
dump. The problem seems to occur f
Jon Beniston wrote:
Hi,
I'm updating a GCC port to 4.0.0. I am seeing a problem whereby registers
that are set to 1 in fixed_regs are being used. The problem is occuring
quite early on in the compiler, as the registers appear in the 00.expand
dump. The problem seems to occur for a DCmode value that
Hi,
I'm updating a GCC port to 4.0.0. I am seeing a problem whereby registers
that are set to 1 in fixed_regs are being used. The problem is occuring
quite early on in the compiler, as the registers appear in the 00.expand
dump. The problem seems to occur for a DCmode value that is being allocated
