On 4/25/07, Rask Ingemann Lambertsen <[EMAIL PROTECTED]> wrote:
Btw, this is no longer true unless you pass -fno-split-wide-types.
No, it is still true in most cases as some targets still have not
split their own patterns for this feature.
In fact in some cases you still want it not to be sp
On Fri, Sep 29, 2006 at 09:52:58AM -0400, David Edelsohn wrote:
>
> The GCC register allocator allocates objects that span multiple
> registers in adjacent registers. For instance, a 64-bit doubleword
> integer (long long int) will be allocated in two adjacent hardware
> registers when GCC
On Fri, Sep 29, 2006 at 05:27:10AM +, Erich Plondke wrote:
> rs6000 and Sparc ports seem to use a peephole2 to get the ldd or lfq
> instructions (respectively), but it looks like there's no reason for
> the register allocater to allocate registers together. The peephole2
> just picks up loads
> Erich Plondke writes:
Erich> I guess in a way this is "autovectorization of random code snippets" so
maybe
Erich> it's too complex but it seems within the realm of what combine could
do...
Yes, this is more appropriately addressed by straight-line code
vectorizations, i.e., SLP.
On 9/29/06, David Edelsohn <[EMAIL PROTECTED]> wrote:
The GCC register allocator allocates objects that span multiple
registers in adjacent registers. For instance, a 64-bit doubleword
integer (long long int) will be allocated in two adjacent hardware
registers when GCC is targeted at a
> Erich Plondke writes:
Erich> Yes, but peephole2 lives after register allocation, so how does the
target
Erich> tell the register allocator that adjacent values loaded from memory
should
Erich> also attempt to be placed adjacent in the register file?
Erich> It looks like if they /happen/ t
On 9/29/06, David Edelsohn <[EMAIL PROTECTED]> wrote:
> Erich Plondke writes:
Erich> rs6000 and Sparc ports seem to use a peephole2 to get the ldd or lfq
Erich> instructions (respectively), but it looks like there's no reason for
Erich> the register allocater to allocate registers together.
> Erich Plondke writes:
Erich> rs6000 and Sparc ports seem to use a peephole2 to get the ldd or lfq
Erich> instructions (respectively), but it looks like there's no reason for
Erich> the register allocater to allocate registers together. The peephole2
Erich> just picks up loads to adjacent me
rs6000 and Sparc ports seem to use a peephole2 to get the ldd or lfq
instructions (respectively), but it looks like there's no reason for
the register allocater to allocate registers together. The peephole2
just picks up loads to adjacent memory locations if the allocater
happens to choose adjace
