On Thu, 6 Mar 2025, Andrew Pinski via Gcc wrote:
> > Why: I have the occasional need to have gcc emit MIPS1 instructions that do
> > not contain a subset of loads and stores (lwl/swl/lwr/swl instructions)
>
> The GCC patch to provide an option not emit lwl/lwr/swl/swr should be easily.
> Somethin
Hello,
Direct questions listed at the end for the impatient :)
Hopefully my mail client wraps the text properly, if not, I apologize in
advance. I haven’t used this client for mailing list posts before…
I’m looking for information on GCC patch submission, hoping someone can
provide some guidance
On Thu, Mar 6, 2025 at 7:14 AM mzpqnxow via Gcc wrote:
>
> Hello,
>
> Direct questions listed at the end for the impatient :)
>
> Hopefully my mail client wraps the text properly, if not, I apologize in
> advance. I haven’t used this client for mailing list posts before…
>
> I’m looking for inform
On 3/6/25 3:07 PM, mzpqnxow via Gcc wrote:
Hello,
Direct questions listed at the end for the impatient :)
Hopefully my mail client wraps the text properly, if not, I apologize in
advance. I haven’t used this client for mailing list posts before…
I’m looking for information on GCC patch submiss
