Petar Penchev wrote:
I tried to use force_reg or PUT_MODE
but it does nothing and PUSH AL, inc S remain.
If nothing is happening, then that means the peephole isn't matching.
The matching happens in peephole2_insns. You could try putting a
breakpoint there and stepping through the code to see wh
Hmm, I tried to define a peephole like this:
//
(define_peephole2
[
(set
(mem:QI (post_inc (reg:HI S_HREG)))
(match_operand:QI 0 "general_operand" "b")
)
(set (reg:HI S_HREG)
On Friday 15 April 2005 13:33, Petar Penchev wrote:
> Hello All,
> The CPU ,I am porting GCC to , has PUSH instruction for half-word (byte)
> and PUSH instruction for word as well.
> GCC is using them well, until I was told to add a command-line option
> which allows GCC to align on word.
> It has
Hello All,
The CPU ,I am porting GCC to , has PUSH instruction for half-word (byte)
and PUSH instruction for word as well.
GCC is using them well, until I was told to add a command-line option
which allows GCC to align on word.
It has been done, however, there samoe problems. GCC generates foll
