Jacob Navia via Gcc writes:
> We have 2 loads, and 1 operation + a store. 4 instructions compared to
> 46 operations for the « gcc way » (16 loads of a byte, 14 x 2 OR
> operations and 8 shifts to split the result and 8 stores of a byte
> each.
The sample code seems to have a couple of errors; I
Hi
In a previous post I pointed to a strange code generation`by gcc in the
riscv-64 targets.
To resume:
Suppose a 64 bit operation: c = a OP b;
Gcc does the following:
Instead of loading 64 bits from memory gcc loads 8 bytes into 8
separate registers for both operands. Then it ORs
