> Ok, I added a df_analyze at the beginning of my target reorg function
> and now it works. Is there anything I should add to cleanup afterwards
> ?
As far as DF is concerned, no, probably nothing.
--
Eric Botcazou
Ok, I added a df_analyze at the beginning of my target reorg function
and now it works. Is there anything I should add to cleanup afterwards
?
Sorry about this, I'm slowly learning different parts of the GCC
compiler as I go,
Thanks again for all your help,
Jc
On Fri, May 1, 2009 at 4:33 PM, Jean
Yes, I have done that and now am looking to limit those numbers. For
example, I don't copy back the ones that are not live-out registers.
It works well but I am have an issue when recompiling the whole
compiler.
I've simplified this to this, if in my reorg function, I do only this :
FOR_EACH
> Let's say I want to rename register r6 to r15. I can safely do that in
> the block if I know that r15 is not used in that basic block and that
> r6 is not a live-out of the basic block.
>
> However, how to handle the case where r6 is a live-out ? Then, I would
> have to make sure that r15 is not
Ok, now in the easy case it seems to be working. I've handled most
cases but I was wondering about one problem that I don't seem to be
able to handle.
Let's say I want to rename register r6 to r15. I can safely do that in
the block if I know that r15 is not used in that basic block and that
r6 is
Ok, I've been working at this and have actually made a bit of progress.
- I now have a framework that finds the group of loads (let's assume
they stay together).
- With the DF framework, I'm able to figure out which registers are
being used and which are free to be used.
- I've pretty much got i
> Ok, I'll try to look at that. Is there an area where I can see how to
> initialize the framework and get information about which registers are
> free?
The API is in df.h, see for example ifcvt.c.
--
Eric Botcazou
> You should use the DF framework in 4.3.x and later.
Ok, I'll try to look at that. Is there an area where I can see how to
initialize the framework and get information about which registers are
free?
Right now, I'm looking in combine.c to see how they are using it. Any
insight would be useful,
> Ok, so if I copy the locally allocated registers into N consecutive
> hard registers BEFORE the group of loads, then rerun cprp_harderg, it
> should replace the ones of the loads to the ones of the copies ? And
> then I suppose the copies will just disappear at a later pass, correct
> ?
Somethin
> The reorg pass runs after register allocation.
> You could try to identify consecutive loads within basic blocks, group them
That is not too difficult, I've written a pass that checks for that
and identifies the loads.
- and rename registers or add
> copy insns to be able replace them with mul
> Does any architecture do such a "machine-specific reorg" pass. I've
> looked around and haven't really seen one.
IA-64 has one, to build bundles; it reuses the scheduler.
> Could you give me an idea of where to look and how exactly that would work?
The reorg pass runs after register allocation
On Mon, Apr 20, 2009 at 1:33 PM, fearyourself wrote:
>
> For the moment, we will be remaining in the 4.3.2 version and have no
> plans to follow the next 4.4/4.5 versions.
>
> Does any architecture do such a "machine-specific reorg" pass. I've
> looked around and haven't really seen one. Could you
For the moment, we will be remaining in the 4.3.2 version and have no
plans to follow the next 4.4/4.5 versions.
Does any architecture do such a "machine-specific reorg" pass. I've
looked around and haven't really seen one. Could you give me an idea
of where to look and how exactly that would work
> This is a little bit simpler than what you find in find_free_reg. Any
> comments/suggestions at this point?
The local register allocator (local-alloc.c) has been removed in the upcoming
4.4.x series of compilers so you might want to try something else. Doing it
during register allocation seems
Ok, I've move forward in this problem by identifying the loads I want
to suggest hard registers for and I've inspired myself with code in
combine_regs and finally have tried this:
/* Suggest pseudo register to hard register */
s_qtyno=reg_qty[pseudo];
if (s_qtyno >= 0) {
Hi all,
My target architecture has an load multiple instruction requiring a
certain number of consecutive registers. I've been working on handling
this case and trying to convince the local register allocator that he
really does want to try to get those consecutive registers for the
loads. But hav
16 matches
Mail list logo
