> Thank you for your reply. I referred to section 13.10, and the description
> there does not precisely specify the result of comparison with CC register.
Quoting section 13.10:
"There are two ways that comparison operations may be used. The
comparison operators may be used to compare the condit
Hi Eric,
Thank you for your reply. I referred to section 13.10, and the description
there does not precisely specify the result of comparison with CC register.
Yes, you are right that as per the description, comparison with CC may not
have anything to do with STORE_FLAG_VALUE. But it clearly says
>
> RTL: (set (reg:QI 0 ax)
> (eq:QI (reg:CCZ 17 flags) (const_int 0)))
>
> Assembly: sete %al
>
>
> Semantics of sete instruction is (as per Intel ma
Hello,
I'm a student and am currently studying compiler. I was studying
GCC's i386 MD, and I found that RTL insn mapped to 'sete' assembly
instruction seems to have exactly opposite semantics than 'sete'
instruction itself. Below are more details. If someone could clarify the
issue, or let me know
