Hello Paolo!
> Heh, I'm quite at a loss regarding PR22480. I don't know exactly what
> to do because i386 does not support, e.g. { 2, 4 } << { 1, 2 } (which
> would give {4, 16} as a result). There is indeed a back-end problem,
> because ashl3 is supposed to have two operands of the same mode,
>
On Thu, Sep 01, 2005 at 09:24:26AM +0200, Paolo Bonzini wrote:
> 1) in the vectorizer, check in the optab if the predicate for each
> operand of an insn accepts a register. If not, refuse vectorization if
> the corresponding gimple operand is not constant.
That sounds plausible, yes.
> By the
Uros Bizjak wrote (privately, but I forwarded to GCC in order to get help):
Hello Paolo!
I was looking at PR middle-end/22480 if there is something to fix at the i386
backend. However, there is no documentation at all regarding vec_shl_ and
vec_shr_ builtins.
Heh, I'm quite at a loss regar
