Hi, Ian,
Thank you for the information about register allocation sequence.
My problem was solved by adding AP-to-FP entry to ELIMINABLE_REGS.
I also encountered another minor problem. When GCC tries to generate a
"push SP" instruction (e.g. some_func(&the_only_local_var);), it is
detecte
Ivan Shcherbakov writes:
> For i386-gcc, this seems to happen during global register allocation
> pass. This corresponds to IRA pass of gcc 4.4.x. I have attached the
> corresponding RTL dump files.
That means that reload is where the register is eliminated, as
expected. Reload is really pa
Hi, Ian,
For i386-gcc, this seems to happen during global register allocation
pass. This corresponds to IRA pass of gcc 4.4.x. I have attached the
corresponding RTL dump files.
--
Best regards,
Ivan Shcherbakov mailto:shcherba...@eit.uni-kl.de
TU Kaiserslautern, German
Ivan Shcherbakov writes:
> It seems that in x86 the argp register gets
> eliminated before the reload phase.
That seems unlikely to me. What pass do you think is eliminating the
argument register?
Ian
Hi, Ian,
I have created a simpler example, just a function computing a sum of
its arguments:
int sum(int a, int b, int c, int d, int e, int f, int g, int h)
{
return a + b + c + d + e + f + g + h;
}
The "argp" is a pseudo-register included in all register classes, that
contain normal
Ivan Shcherbakov writes:
> ELIMINATE_REGS and TARGET_CAN_ELIMINATE are set correctly. As far as I
> understand from further investigation, at some point during
> compilation, the argument pointer register is used, then the
> expand_prologue() produces INSNs including "push
Hi, Ian,
ELIMINATE_REGS and TARGET_CAN_ELIMINATE are set correctly. As far as I
understand from further investigation, at some point during
compilation, the argument pointer register is used, then the
expand_prologue() produces INSNs including "push argp" (as "argp" is
pres
Ivan Shcherbakov writes:
> I have noticed that the latest ports of GCC (e.g. i386) use a
> pseudo-register (argp in i386) defined as fixed in FIXED_REGISTERS.
> When I implement it similarly in msp430 port (instead of hardware
> register r5, add a pseudo-register marked as fi
