Andrew Pinski wrote:
> Yury Gribov wrote:
>> Andrew Pinski wrote:
>>> Yury Gribov wrote:
I've recently noticed that GCC generates suboptimal code
for Asan on ARM targets. E.g. for a 4-byte memory access check
>>>
>>> Does the patch series at located at:
>>> http://gcc.gnu.org/ml/gcc-patc
Andrew wrote:
I think it would good to figure out how to improve this code gen
with the above patches rather than changing asan.
I suspect it might easy to expand them to handle this case too.
True, let me take a closer look and get back to you. When will this is
expected to land in trunk bt
On Tue, Apr 29, 2014 at 7:50 AM, Yury Gribov wrote:
> Hi all,
>
> I've recently noticed that GCC generates suboptimal code for Asan on ARM
> targets. E.g. for a 4-byte memory access check
>
> (shadow_val != 0) & (last_byte >= shadow_val)
>
> we get the following sequence:
>
> movr2, r0
On Tue, Apr 29, 2014 at 09:50:56AM +0400, Yury Gribov wrote:
> I've recently noticed that GCC generates suboptimal code for Asan on
> ARM targets. E.g. for a 4-byte memory access check
>
> (shadow_val != 0) & (last_byte >= shadow_val)
I guess the important question is, if you write the same i
> On Apr 29, 2014, at 12:08 AM, Yury Gribov wrote:
>
> Andrew wrote:
> > Does the patch series at located at:
> > http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01407.html
> > http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01405.html
> > Fix this code generation issue? I suspect it does and improv
Andrew wrote:
> Does the patch series at located at:
> http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01407.html
> http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01405.html
> Fix this code generation issue? I suspect it does and improves more
> than just the above code.
No, they don't help as is.
-
+ eugeni.stepanov
On Tue, Apr 29, 2014 at 10:04 AM, Andrew Pinski wrote:
> On Mon, Apr 28, 2014 at 10:50 PM, Yury Gribov wrote:
>> Hi all,
>>
>> I've recently noticed that GCC generates suboptimal code for Asan on ARM
>> targets. E.g. for a 4-byte memory access check
>>
>> (shadow_val != 0)
On Mon, Apr 28, 2014 at 10:50 PM, Yury Gribov wrote:
> Hi all,
>
> I've recently noticed that GCC generates suboptimal code for Asan on ARM
> targets. E.g. for a 4-byte memory access check
>
> (shadow_val != 0) & (last_byte >= shadow_val)
>
> we get the following sequence:
>
> movr2, r
