Re: HELP: MIPS PC Relative Addressing

2021-03-04 Thread Maciej W. Rozycki
On Thu, 4 Mar 2021, Jiaxun Yang wrote: > > I'm not sure though why you try to avoid composed relocations given we've > > had them for 20+ years now. Relocations are just calculation operators > > for expressions evaluated at link time rather than assembly or high-level > > language compilation

Re: HELP: MIPS PC Relative Addressing

2021-03-03 Thread Jiaxun Yang
在 2021/3/2 下午11:30, Maciej W. Rozycki 写道: On Tue, 2 Mar 2021, Jiaxun Yang wrote: After spending days poking with AUIPC, I suddenly found we indeed have ALUIPC instruction in MIPS R6, which will clear low 16bit of AUIPC result. So the whole thing now looks easier, we can have R_MIPS_PC_PAGE

Re: HELP: MIPS PC Relative Addressing

2021-03-02 Thread Maciej W. Rozycki
On Tue, 2 Mar 2021, Jiaxun Yang wrote: > After spending days poking with AUIPC, I suddenly found we indeed have ALUIPC > instruction in MIPS R6, which will clear low 16bit of AUIPC result. > > So the whole thing now looks easier, we can have R_MIPS_PC_PAGE and > R_MIPS_PC_OFST and avoid all mess

Re: HELP: MIPS PC Relative Addressing

2021-03-01 Thread Jiaxun Yang
在 2021/2/25 上午5:40, Jim Wilson 写道: On Wed, Feb 24, 2021 at 6:18 AM Jiaxun Yang > wrote: I found it's very difficult for GCC to generate this kind of pcrel_lo expression, RTX label_ref can't be lower into such LOW_SUM expression. Yes, it is difficu

Re: HELP: MIPS PC Relative Addressing

2021-02-27 Thread Maciej W. Rozycki
On Thu, 25 Feb 2021, Jiaxun Yang wrote: > > You may want to use composed relocations to refer to .LA1 (R_MIPS_32) and > > .LA0 (R_MIPS_SUB). There may or may not be linker updates needed; unlike > > the RISC-V one the MIPS BFD backend already supports composed relocations > > with the usual ELF

Re: HELP: MIPS PC Relative Addressing

2021-02-25 Thread Maciej W. Rozycki
On Thu, 25 Feb 2021, Jiaxun Yang wrote: > > > I'll take this approach first, add "lla, dlla" pseudo-instructions to > > > assembler and seeking optimization > > > in future. > > > > The DLA and LA macros are supposed to do that already, no need to invent > > new names. > > Hmm, how could we te

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Jiaxun Yang
On Thu, Feb 25, 2021, at 10:57 AM, Maciej W. Rozycki wrote: > On Thu, 25 Feb 2021, Jiaxun Yang wrote: > > > > There is a far easier way to do this, which is to just emit an assembler > > > macro, and let the assembler generate the labels and relocs.  This is what > > > the RISC-V GCC port does

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Maciej W. Rozycki
On Thu, 25 Feb 2021, Jiaxun Yang wrote: > > There is a far easier way to do this, which is to just emit an assembler > > macro, and let the assembler generate the labels and relocs.  This is what > > the RISC-V GCC port does by default.  This prevents some optimizations like > > scheduling the two

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Jiaxun Yang
在 2021/2/25 上午1:30, Maciej W. Rozycki 写道: On Wed, 24 Feb 2021, Jiaxun Yang wrote: For RISC-V, %pcrel_lo shall point to the label of corresponding %pcrel_hi, like .LA0:     auipc    a0, %pcrel_hi(sym)     addi  a0, a0, %pcrel_lo(.LA0) I commented on it once, in the course of the FDPIC

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Jiaxun Yang
在 2021/2/25 上午5:40, Jim Wilson 写道: On Wed, Feb 24, 2021 at 6:18 AM Jiaxun Yang > wrote: I found it's very difficult for GCC to generate this kind of pcrel_lo expression, RTX label_ref can't be lower into such LOW_SUM expression. Yes, it is difficult.

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Maciej W. Rozycki
On Wed, 24 Feb 2021, Jim Wilson wrote: > > I commented on it once, in the course of the FDPIC design project, and I > > find it broken by design. Sadly it has made it into the RISC-V psABI and > > it is hard to revert at this time, too many places have started relying on > > it. > > > > It was

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Jim Wilson
On Wed, Feb 24, 2021 at 9:30 AM Maciej W. Rozycki wrote: > On Wed, 24 Feb 2021, Jiaxun Yang wrote: > > > For RISC-V, %pcrel_lo shall point to the label of corresponding > %pcrel_hi, > > like > > > > .LA0: > > auipca0, %pcrel_hi(sym) > > addi a0, a0, %pcrel_lo(.LA0) > > I comment

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Jim Wilson
On Wed, Feb 24, 2021 at 6:18 AM Jiaxun Yang wrote: > I found it's very difficult for GCC to generate this kind of pcrel_lo > expression, > RTX label_ref can't be lower into such LOW_SUM expression. > Yes, it is difficult. You need to generate a label, and put the label number in an unspec in th

Re: HELP: MIPS PC Relative Addressing

2021-02-24 Thread Maciej W. Rozycki
On Wed, 24 Feb 2021, Jiaxun Yang wrote: > For RISC-V, %pcrel_lo shall point to the label of corresponding %pcrel_hi, > like > > .LA0: >     auipc    a0, %pcrel_hi(sym) >     addi  a0, a0, %pcrel_lo(.LA0) I commented on it once, in the course of the FDPIC design project, and I find it broke