Hi,
On Fri, 20 Jan 2017, Richard Henderson wrote:
> > You can't have a 4-aligned type of size 3. Sizes must be multiples of
> > alignment (otherwise arrays don't work). The type of a 3-sized field
> > in a packed struct that syntactically might be a 4-aligned type (e.g.
> > by using attribut
On 01/20/2017 05:41 AM, Michael Matz wrote:
Hi,
On Wed, 18 Jan 2017, Richard Henderson wrote:
Section 3 Rationale, alternative 1: I'm wondering if the example is
correct. For a 4-byte-aligned type of size 3, the implementation
cannot simply use 4-byte hardware-backed atomics because this will
Hi,
On Wed, 18 Jan 2017, Richard Henderson wrote:
> > Section 3 Rationale, alternative 1: I'm wondering if the example is
> > correct. For a 4-byte-aligned type of size 3, the implementation
> > cannot simply use 4-byte hardware-backed atomics because this will
> > inevitably touch the 4th by
On Thu, 2016-12-22 at 11:37 -0600, Segher Boessenkool wrote:
> On Thu, Dec 22, 2016 at 03:28:56PM +0100, Ulrich Weigand wrote:
> > However, there still seems to be a problem, but this time related to
> > alignment issues. We do have the 16-byte atomic instructions, but they
> > only work on 16-byt
On Wed, 2017-01-18 at 14:23 -0800, Richard Henderson wrote:
> On 01/17/2017 09:00 AM, Torvald Riegel wrote:
> > I think the ABI should set a baseline for each architecture, and the
> > baseline decides whether something is inlinable or not. Thus, the
> > x86_64 ABI would make __int128 operations n
On 01/17/2017 09:00 AM, Torvald Riegel wrote:
I think the ABI should set a baseline for each architecture, and the
baseline decides whether something is inlinable or not. Thus, the
x86_64 ABI would make __int128 operations not imlinable (because of the
issues with cmpxchg16b, see above).
If use
On Thu, 2016-11-17 at 12:12 -0800, Bin Fan wrote:
> On 11/14/2016 4:34 PM, Bin Fan wrote:
> > Hi All,
> >
> > I have an updated version of libatomic ABI specification draft. Please
> > take a look to see if it matches GCC implementation. The purpose of
> > this document is to establish an officia
On 22/12/16 17:37, Segher Boessenkool wrote:
> We do not always have all atomic instructions. Not all processors have
> all, and it depends on the compiler flags used which are used. How would
> libatomic know what compiler flags are used to compile the program it is
> linked to?
>
> Sounds like
On Thu, Dec 22, 2016 at 03:28:56PM +0100, Ulrich Weigand wrote:
> However, there still seems to be a problem, but this time related to
> alignment issues. We do have the 16-byte atomic instructions, but they
> only work on 16-byte aligned data. This is a problem in particular
> since the default
Szabolcs Nagy wrote:
> On 20/12/16 13:26, Ulrich Weigand wrote:
> > I may have missed the context of the discussion, but just on the
> > specific ISA question here: both Power and z not only have the
> > 16-byte CAS (or load-and-reserve/store-conditional), but they also both
> > have specific 16-by
On 20/12/16 13:26, Ulrich Weigand wrote:
> Torvald Riegel wrote:
>> On Fri, 2016-12-02 at 12:13 +0100, Gabriel Paubert wrote:
>>> On Thu, Dec 01, 2016 at 11:13:37AM -0800, Bin Fan at Work wrote:
Thanks for the comment. Yes, the ABI requires libatomic must query the
hardware. This is
>>>
Torvald Riegel wrote:
> On Fri, 2016-12-02 at 12:13 +0100, Gabriel Paubert wrote:
> > On Thu, Dec 01, 2016 at 11:13:37AM -0800, Bin Fan at Work wrote:
> > > Thanks for the comment. Yes, the ABI requires libatomic must query the
> > > hardware. This is
> > > necessary if we want the compiler to ge
On Fri, 2016-12-02 at 12:13 +0100, Gabriel Paubert wrote:
> On Thu, Dec 01, 2016 at 11:13:37AM -0800, Bin Fan at Work wrote:
> > Hi Szabolcs,
> >
> > > On Nov 29, 2016, at 3:11 AM, Szabolcs Nagy wrote:
> > >
> > > On 17/11/16 20:12, Bin Fan wrote:
> > >>
> > >> Although this ABI specification s
On Thu, Dec 01, 2016 at 11:13:37AM -0800, Bin Fan at Work wrote:
> Hi Szabolcs,
>
> > On Nov 29, 2016, at 3:11 AM, Szabolcs Nagy wrote:
> >
> > On 17/11/16 20:12, Bin Fan wrote:
> >>
> >> Although this ABI specification specifies that 16-byte properly aligned
> >> atomics are inlineable on pla
Hi Szabolcs,
> On Nov 29, 2016, at 3:11 AM, Szabolcs Nagy wrote:
>
> On 17/11/16 20:12, Bin Fan wrote:
>>
>> Although this ABI specification specifies that 16-byte properly aligned
>> atomics are inlineable on platforms
>> supporting cmpxchg16b, we document the caveats here for further discuss
On 17/11/16 20:12, Bin Fan wrote:
>
> Although this ABI specification specifies that 16-byte properly aligned
> atomics are inlineable on platforms
> supporting cmpxchg16b, we document the caveats here for further discussion.
> If we decide to change the
> inlineable attribute for those atomics,
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