Re: Bug in Instruction Combination procedure and RTL generation.

2006-09-04 Thread Paolo Bonzini
First of all thx for fast reply and hints, Sorry, what do you mean with "is still there"? which release/arc/bug- entry at bugzilla is pointing the same? 'Couse if i compile on x86 as: I'm speaking about a mainline compiler, configured for arc-none-elf. What I mean is that the change in com

Re: Bug in Instruction Combination procedure and RTL generation.

2006-09-04 Thread J.J. Garcia
El lun, 04-09-2006 a las 09:20 +0200, Paolo Bonzini escribió: > J.J. Garcia wrote: > > Hi all, > > > > I'm trying to debug a code optimization in gcc for an specific arch, to > > be more explicit it's for gcc 2.95.3 for Metaware ARC target > > architecture, i know the old release of compiler and i

Re: Bug in Instruction Combination procedure and RTL generation.

2006-09-04 Thread Paolo Bonzini
J.J. Garcia wrote: Hi all, I'm trying to debug a code optimization in gcc for an specific arch, to be more explicit it's for gcc 2.95.3 for Metaware ARC target architecture, i know the old release of compiler and i know there will not be lot of support about it, anyway im keep on trying..., T