Zhang Le <[EMAIL PROTECTED]> writes:
> On 19:18 Mon 10 Nov , Zhang Le wrote:
>> However, now I think adding a earlyclobber constraint may be the way to go.
>> Since it is a less intrusive and more elegant (comparing with my patch
>> above) change.
>
> This solution is as easy as adding two byt
On 19:18 Mon 10 Nov , Zhang Le wrote:
> However, now I think adding a earlyclobber constraint may be the way to go.
> Since it is a less intrusive and more elegant (comparing with my patch above)
> change.
This solution is as easy as adding two bytes (two &s's) to the original patch:
@@ -11,7
On 09:18 Mon 10 Nov , Eric Fisher wrote:
> > So I think one of the possible solution would be to reverse the div.g and
> > teq insn.
> > And I think this is not hard to do, just modify mips_output_division()
> > function.
> > Also I think this is a better solution, since we can save a registe
On 18:31 Sun 09 Nov , Andrew Haley wrote:
> Zhang Le wrote:
>
> >
> > The other would be make sure the destination register is different from
> > source registers.
> > I have read some docs, but still not sure how to do it.
>
> That's just an earlyclobber. Search for that.
Thank you, Andr
> So I think one of the possible solution would be to reverse the div.g and teq
> insn.
> And I think this is not hard to do, just modify mips_output_division()
> function.
> Also I think this is a better solution, since we can save a register.
Do you mean the modification like this?
+
+
+/* Us
Zhang Le wrote:
>
> The other would be make sure the destination register is different from
> source registers.
> I have read some docs, but still not sure how to do it.
That's just an earlyclobber. Search for that.
Andrew.
