On Thu, Jan 06, 2011 at 09:59:08AM +0200, Revital1 Eres wrote:
> Index: loop-doloop.c
> + Some targets (ARM) do the comparison before the branch, as in the
> + folloring form:
^
"following"
> + /* In case the pattern is not PARALLEL we expect two forms
> + of dol
>> Index: config/arm/thumb2.md
>> ===
>> --- config/arm/thumb2.md (revision 168424)
>> +++ config/arm/thumb2.md (working copy)
>
>> + ??? The possible introduction of a new block to initialize the
>> + new IV can po
Revital1 Eres writes:
> Index: loop-doloop.c
> ===
> --- loop-doloop.c (revision 168397)
> +++ loop-doloop.c (working copy)
> + /* The third case: the compre and decrement instructions
s/compre/compare/.
> Index: con
Hello,
>
> @@ -162,6 +175,7 @@ doloop_condition_get (rtx doloop_pat)
> return 0;
>
>if ((XEXP (condition, 0) == reg)
> + || (REGNO (XEXP (condition, 0)) == CC_REGNUM)
>|| (GET_CODE (XEXP (condition, 0)) == PLUS
>&& XEXP (XEXP (condition, 0), 0) == reg))
>
On Thu, 2010-12-30 at 18:56 +0200, Revital1 Eres wrote:
> Hello,
>
> The attached patch is my latest attempt to model doloop for arm.
> I followed Chung-Lin Tang suggestion and used subs+jump similar to your
> patch.
> On crotex-A8 I see gain of 29% on autocor benchmark (telecom suite) with
> SMS
Hello,
The attached patch is my latest attempt to model doloop for arm.
I followed Chung-Lin Tang suggestion and used subs+jump similar to your
patch.
On crotex-A8 I see gain of 29% on autocor benchmark (telecom suite) with
SMS using the following flags: -fmodulo-sched-allow-regmoves
-funsafe-loop
Roman Zhuykov wrote:
> Memory is used instead of a register to store doloop counter.
Yes, this can happen, and your doloop insn pattern *must* be
able to handle this. This is usually done via a splitter
(and possibly an additional scratch register allocated via
an extra insn operand). See vario
