On Mar 1, 2007, at 12:57 AM, Tehila Meyzels wrote:
Revital Eres wrote on 01/03/2007 10:37:36:
Hello,
I wonder why this order (non-consecutive, decreasing) of Altivec
registers
was chosen when specifying the allocation order in REG_ALLOC_ORDER.
(taken from rs6000.h)
/* AltiVec registers
Revital Eres wrote on 01/03/2007 10:37:36:
>
> Hello,
>
> I wonder why this order (non-consecutive, decreasing) of Altivec
registers
> was chosen when specifying the allocation order in REG_ALLOC_ORDER.
>
> (taken from rs6000.h)
>
>/* AltiVec registers. */
Hello,
I wonder why this order (non-consecutive, decreasing) of Altivec registers
was chosen when specifying the allocation order in REG_ALLOC_ORDER.
(taken from rs6000.h)
/* AltiVec registers. */\
77, 78,