RE: Issues with GCSE pre step and double hard registers

2013-12-11 Thread Claudiu Zissulescu
> What is the expression that is recorded as anticipated in insn 38? Is it > "mho:SI > 0>>0x3" or "udiv(r159:SI,0xa)" from the REG_EQUAL note? Just to be clear, the anticipated operation is "mho:SI 0>>9x31". //Claudiu

RE: Issues with GCSE pre step and double hard registers

2013-12-11 Thread Claudiu Zissulescu
> I don't think this is not the right fix for the problem. GCSE doesn't handle > expressions containing hard registers, oprs_unchanged_p should never even > see expressions involving hard registers. I was afraid of this one. > > What is the expression that is recorded as anticipated in insn 38?

Re: Issues with GCSE pre step and double hard registers

2013-12-10 Thread Steven Bosscher
On Tue, Dec 10, 2013 at 4:17 PM, Claudiu Zissulescu wrote: > Hi, > > Our ARC processor has a multiplication operation that returns a 64 bit result > into a fixed register pair named like this: > > mlo:DI=zero_extend(r159:SI)*sign_extend(r181:SI) > > The GCSE rtl pre step has some difficulties to