age-
> From: gcc-ow...@gcc.gnu.org [mailto:gcc-ow...@gcc.gnu.org] On Behalf Of
> Nikolai Bozhenov
> Sent: Monday, September 14, 2015 2:28
> To: James Greenhalgh
> Cc: gcc@gcc.gnu.org
> Subject: Re: [AArch64] A question about Cortex-A57 pipeline description
>
> Thanks for
Thanks for the reply! I see you point. Indeed, I've also seen cases
where the
load pipeline was overused at the beginning of a basic block, whereas at
the end
the code got stuck with a bunch of stores and no other instructions to
run in
parallel. And indeed, relaxing the restrictions makes thing
On Fri, Sep 11, 2015 at 04:31:37PM +0100, Nikolai Bozhenov wrote:
> Hi!
>
> Recently I got somewhat confused by Cortex-A57 pipeline description in
> GCC and
> I would be grateful if you could help me understand a few unclear points.
Sure,
> Particularly I am interested in how memory operations
