Hi,
On Mon, 25 Feb 2019, Segher Boessenkool wrote:
> Yup. All good points, I didn't think this through enough obviously.
>
> The _1+_1 isn't great if that single pseudo then ends up in mem (it will
> need a reload again on most archs, probably causing another spill), btw.
But at least it'll g
Hi!
On Mon, Feb 25, 2019 at 06:32:53PM +, Michael Matz wrote:
> On Thu, 21 Feb 2019, Segher Boessenkool wrote:
> > > That said, the "bug" in the case we're seeing, is that asmcons rewrote
> > > all of "input"'s pseudos, and it should be more careful to not create
> > > rtl with illegal const
Hi,
On Thu, 21 Feb 2019, Segher Boessenkool wrote:
> > That said, the "bug" in the case we're seeing, is that asmcons rewrote
> > all of "input"'s pseudos, and it should be more careful to not create
> > rtl with illegal constraint usage that LRA cannot fix up. With the
> > fix, operand %1 in
On Thu, Feb 21, 2019 at 05:16:48PM -0600, Peter Bergner wrote:
> About the only usage of register asm that is guaranteed, is their
> usage in inline asm. If you specify a hard register for a variable
> and then use that variable in an inline asm, you are guaranteed
> that that variable will use th
On 2/20/19 9:39 PM, Alan Modra wrote:
> On Wed, Feb 20, 2019 at 08:57:52PM -0600, Peter Bergner wrote:
>> Yes, because they don't have my IRA and LRA patches that exposed this
>> problem. I would say they were buggy for not complaining and silently
>> spilling a hard register in the case where we u
On Wed, Feb 20, 2019 at 08:57:52PM -0600, Peter Bergner wrote:
> On 2/20/19 4:19 PM, Alan Modra wrote:
> > I forgot to say, gcc-6, gcc-7 and gcc-8 handle your original testcase
> > with the register asm just fine.
>
> Yes, because they don't have my IRA and LRA patches that exposed this
> problem.
On 2/20/19 4:04 PM, Alan Modra wrote:
> On Wed, Feb 20, 2019 at 10:08:07AM -0600, Peter Bergner wrote:
>> On 2/19/19 9:09 PM, Alan Modra wrote:
>> That said, talking with Segher and Uli offline, they both think the
>> inline asm usage in the test case should be legal
>
> Good, it seems we are in a
On 2/20/19 4:19 PM, Alan Modra wrote:
> I forgot to say, gcc-6, gcc-7 and gcc-8 handle your original testcase
> with the register asm just fine.
Yes, because they don't have my IRA and LRA patches that exposed this
problem. I would say they were buggy for not complaining and silently
spilling a ha
I forgot to say, gcc-6, gcc-7 and gcc-8 handle your original testcase
with the register asm just fine.
--
Alan Modra
Australia Development Lab, IBM
On Wed, Feb 20, 2019 at 10:08:07AM -0600, Peter Bergner wrote:
> On 2/19/19 9:09 PM, Alan Modra wrote:
> > On Mon, Feb 18, 2019 at 01:13:31PM -0600, Peter Bergner wrote:
> >> long input;
> >> long
> >> bug (void)
> >> {
> >> register long output asm ("r3");
> >> asm ("blah %0, %1, %2" : "=&r" (
On Wed, Feb 20, 2019 at 10:08:07AM -0600, Peter Bergner wrote:
> On 2/19/19 9:09 PM, Alan Modra wrote:
> > On Mon, Feb 18, 2019 at 01:13:31PM -0600, Peter Bergner wrote:
> >> long input;
> >> long
> >> bug (void)
> >> {
> >> register long output asm ("r3");
> >> asm ("blah %0, %1, %2" : "=&r" (
On 2/19/19 9:09 PM, Alan Modra wrote:
> On Mon, Feb 18, 2019 at 01:13:31PM -0600, Peter Bergner wrote:
>> long input;
>> long
>> bug (void)
>> {
>> register long output asm ("r3");
>> asm ("blah %0, %1, %2" : "=&r" (output) : "r" (input), "0" (input));
>> return output;
>> }
>>
>> I know an i
On Mon, Feb 18, 2019 at 01:13:31PM -0600, Peter Bergner wrote:
> I have a question about constraint usage in inline asm when we have
> an early clobber output operand. The test case is from PR89313 and
> looks like the code below (I'm using "r3" for the reg on ppc, but
> you could also use "rax" o
I have a question about constraint usage in inline asm when we have
an early clobber output operand. The test case is from PR89313 and
looks like the code below (I'm using "r3" for the reg on ppc, but
you could also use "rax" on x86_64, etc.).
long input;
long
bug (void)
{
register long output
14 matches
Mail list logo
