Ling-hua Tseng wrote:
> It's only correct if the two RISC insns reserved the same RISC function
> unit.
Try defining two separate reservations for each pipe, e.g. a
risc_data_processing_r0 and a risc_data_processing_r1. Then you can
write the bypass rule in the obvious way.
--
Jim Wilson, GNU To
I'm porting GCC 4.0.2 to a new VLIW architecture.
There are 10 functions units (2 RISCs and 8 DSPs) in the architecture.
The pipeline stages are: IS, ID(fetch operand), E1(ALU), E2, E3, E4(write back
to register)
For the circuit area reason, the pipeline forwarding mechanism is not available
acr
