Le lundi 14 avril 2008 à 18:27 -0700, Jim Wilson a écrit :
> On Tue, 2008-04-15 at 00:06 +0200, Stelian Pop wrote:
> > - I had to add a PLUS case in PREFERRED_RELOAD_CLASS() or else reload
> > kept generating incorrect insn (putting constants into EVEN_REGS for
> > example). I'm not sure this
On Tue, 2008-04-15 at 00:06 +0200, Stelian Pop wrote:
> - I had to add a PLUS case in PREFERRED_RELOAD_CLASS() or else reload
> kept generating incorrect insn (putting constants into EVEN_REGS for
> example). I'm not sure this is correct or if it hides something else...
It does sound odd, b
Le vendredi 11 avril 2008 à 11:14 -0700, Jim Wilson a écrit :
> Stelian Pop wrote:
> > #define PREFERRED_RELOAD_CLASS(X, CLASS)\
> > ((CONSTANT_P(X)) ? EIGHT_REGS : \
> >(MEM_P(X)) ? EVEN_REGS : CLASS)
> >
> > #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CL
Stelian Pop wrote:
I will still have the problems with the fact that my indirect addressing
doesn't allow displacements, no ? (so I would need to implement
LEGITIMIZE_RELOAD_ADDRESS, in which I'll need a special reserved
register to compute the full address by adding the base and the
displacement
On Sat, 2008-04-12 at 00:06 +0200, Stelian Pop wrote:
> I will still have the problems with the fact that my indirect addressing
> doesn't allow displacements, no ? (so I would need to implement
> LEGITIMIZE_RELOAD_ADDRESS, in which I'll need a special reserved
> register to compute the full addres
Le vendredi 11 avril 2008 à 11:14 -0700, Jim Wilson a écrit :
> Stelian Pop wrote:
> > #define PREFERRED_RELOAD_CLASS(X, CLASS)\
> > ((CONSTANT_P(X)) ? EIGHT_REGS : \
> >(MEM_P(X)) ? EVEN_REGS : CLASS)
> >
> > #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CL
Stelian Pop wrote:
#define PREFERRED_RELOAD_CLASS(X, CLASS)\
((CONSTANT_P(X)) ? EIGHT_REGS : \
(MEM_P(X)) ? EVEN_REGS : CLASS)
#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \
((CONSTANT_P(X)) ? EIGHT_REGS : \
Le jeudi 10 avril 2008 à 15:56 -0400, [EMAIL PROTECTED] a écrit :
> I noticed
>
>
> Stack register is missing from ALL_REGS.
No, it is not. It is missing from GENERAL_REGS but not from ALL_REGS.
> Are registers 16bit?
Yes.
> Is just one required for pointer?
For now, yes, I chose to suppor
I noticed
Stack register is missing from ALL_REGS.
Are registers 16bit? Is just one required for pointer?
Andy
Le jeudi 10 avril 2008 à 15:30 -0400, DJ Delorie a écrit :
> > (call (mem:QI (match_operand:QI 1 "register_operand" "z"))
>
> Are you sure your "z" constraint only matches even numbered hard
> registers?
Well, I think so:
enum reg_class
{
NO_REGS,
> (call (mem:QI (match_operand:QI 1 "register_operand" "z"))
Are you sure your "z" constraint only matches even numbered hard
registers?
Le jeudi 10 avril 2008 à 15:48 +0200, Stelian Pop a écrit :
> Le mercredi 09 avril 2008 à 18:21 -0400, DJ Delorie a écrit :
> > > Maybe I should reserve a special register for this usage (say r0).
> >
> > That might be the only way, yes.
>
> Ok, I reserved r0 (BP_REGNUM) for such reloads, and I'
Le mercredi 09 avril 2008 à 18:21 -0400, DJ Delorie a écrit :
> > Maybe I should reserve a special register for this usage (say r0).
>
> That might be the only way, yes.
Ok, I reserved r0 (BP_REGNUM) for such reloads, and I'm generating new
instructions in LEGITIMIZE_RELOAD_ADDRESS to calculate
> Maybe I should reserve a special register for this usage (say r0).
That might be the only way, yes.
Note that reload also assumes that such adds don't change the flags
(i.e. a compare/jump pair must not have a flag-modifying add between
them).
Le mercredi 09 avril 2008 à 21:19 +0200, Stelian Pop a écrit :
> > You might need to define LEGITIMIZE_RELOAD_ADDRESS, or at least
> > LEGITIMIZE_ADDRESS. I don't know if reload has assumptions about such
> > offsets, but the m32c port has a limit on the offset range so it might
> > help you fig
Le mercredi 09 avril 2008 à 12:41 -0400, DJ Delorie a écrit :
> > switch (which_alternative) {
> > case 0: /* register to register */
>
> Better to just use the @ syntax that gcc offers, to provide multiple
> patterns:
>
> "@
> tfr %0,%1
>
> switch (which_alternative) {
> case 0: /* register to register */
Better to just use the @ syntax that gcc offers, to provide multiple
patterns:
"@
tfr %0,%1
ldih %0, hi(%1); ldil %0, lo(%1)
ldih %0, hi(%1); ldil %0, lo(%1
[Putting the gcc-list back in CC:, ]
Le mardi 08 avril 2008 à 18:24 -0400, DJ Delorie a écrit :
> Do you have one insn for each pair of src/dest that movqi supports?
> If so, this isn't the best way to do it - you should have one insn
> with multiple constraint alternativess, not multiple insns.
Take at look at AVR target which is very similar.
Here onluy "d" constrained register accept constants (they are call used
registers too)
The AVR move pattern (*reloadinqi) has multiple constrain options "d"
against "i" being relevant. So check you have all the combinations
defined. You omit
Hi,
I'm working on a GCC (4.3.0) backend for a custom 16 bit microcontroller
we're designing at work, and I'm facing a reload problem. After having
lost many hours trying to make it work, I decided to ask for some
help :)
I'll try to summarize the situation below, but by all means please ask
for
20 matches
Mail list logo
