For the instant, I am learning for how GCC work, and for the definition
of machines descriptor. I founded the GCC port for PIC30, but it 's very
far of the PIC18.
I also seen the IP2022 port, and it will be helpfull.
In the Microchip PIC, there is only one Work register, but all the RAM
m
> everything else in data memory (which they use in the manner of a
> register file)...IDK how well GCC's register allocator would handle
> such a thing...
For the m32c, I ended up describing 8 "registers" that were really
memory. It gave gcc something to work with at least, but you have to
get
I'm sorry about my e-mail client mangling your name in the To: field.
I don't know about the Microchip source, but I'd be happy to help with
the GCC->PIC18Fxxx port...however, PIC's have 1 true accumulator (W) and
everything else in data memory (which they use in the manner of a
register file)
Hello,
I am talking about porting GCC on PIC18Fxxx, by Microchip.
I found some source code from Microchip to support the PIC30F. Anyone
can tell me why this code isn't in the gcc tree ? Is it dirty code ?
I ask this question, cause I maybe re-use that source code for testing.
Best Regards,
--
> > or if the memory model of the PIC18 is definitively a problem to
> > gcc porting ?
>
> Weird chips make porting harder. :-)
Hey, if I can get the m32c series supported...
But yeah, gcc *really* wants to see a standard RISC chip these days.
On Jan 8, 2006, at 3:11 PM, [EMAIL PROTECTED] wrote:
So can you tell me more about your experience with the Microchip
18F, if
somebody is currently working on this device,
Nope, don't think so.
or if the memory model of the PIC18 is definitively a problem to
gcc porting ?
Weird chips mak
Hello,
With a friend, we are interested in the port of gcc on Microchip Pic18.
So can you tell me more about your experience with the Microchip 18F, if
somebody is currently working on this device, how to find his work, or if the
memory model of the PIC18 is definitively a problem to gcc porting
