Re: Machine description question

2010-05-14 Thread Hariharan Sandanagobalane
instruction that should be moved but not? Cheers, Bingfeng -Original Message- From: Hariharan Sandanagobalane [mailto:harihar...@picochip.com] Sent: 14 May 2010 12:26 To: Bingfeng Mei Cc: gcc@gcc.gnu.org Subject: Re: Machine description question Hi Bengfeng, Changing my instruction patterns

RE: Machine description question

2010-05-14 Thread Bingfeng Mei
iharan Sandanagobalane [mailto:harihar...@picochip.com] > Sent: 14 May 2010 12:26 > To: Bingfeng Mei > Cc: gcc@gcc.gnu.org > Subject: Re: Machine description question > > Hi Bengfeng, > Changing my instruction patterns similar to the ones that you > sent does > get over t

Re: Machine description question

2010-05-14 Thread Hariharan Sandanagobalane
ll porivate and not in mainline. Cheers, Bingfeng -Original Message- From: Hariharan Sandanagobalane [mailto:harihar...@picochip.com] Sent: 13 May 2010 10:17 To: Bingfeng Mei Cc: gcc@gcc.gnu.org Subject: Re: Machine description question The patterns for PUT/GET were ; Scalar Pu

RE: Machine description question

2010-05-13 Thread Bingfeng Mei
s just "machine-specific" > operation and > the optimizer probably rightly assumes that multiple > execution of this > with same parameters would result in same value being produced. This > obviously is not the case for these communication instructions. > > Do

Re: Machine description question

2010-05-13 Thread Hariharan Sandanagobalane
with same parameters would result in same value being produced. This obviously is not the case for these communication instructions. Do you have your code to do this using unspec in gcc mainline? Can you point me to that, please? Thanks Hari Bingfeng Mei wrote: How do you define your imaginary register

RE: Machine description question

2010-05-12 Thread Bingfeng Mei
g > Subject: Re: Machine description question > > Thanks for your help BingFeng. > > I gave this a go and ended up with worse code (and worse > memory usage) > than before. I started with this experiment because of the compilers > "All virtual regis

Re: Machine description question

2010-05-12 Thread Hariharan Sandanagobalane
vent some wrong optimizations. Cheers, Bingfeng -Original Message- From: gcc-ow...@gcc.gnu.org [mailto:gcc-ow...@gcc.gnu.org] On Behalf Of Hariharan Sent: 12 May 2010 11:18 To: gcc@gcc.gnu.org Subject: Machine description question Hello all, Picochip has communication instructions

RE: Machine description question

2010-05-12 Thread Bingfeng Mei
independent expression in your pattern to prevent some wrong optimizations. Cheers, Bingfeng > -Original Message- > From: gcc-ow...@gcc.gnu.org [mailto:gcc-ow...@gcc.gnu.org] On > Behalf Of Hariharan > Sent: 12 May 2010 11:18 > To: gcc@gcc.gnu.org > Subject: Machine de

Machine description question

2010-05-12 Thread Hariharan
Hello all, Picochip has communication instructions that allow one array element to pass data to another. There are 3 such instructions PUT/GET/TSTPORT. Currently, all three of these use UNSPEC_VOLATILE side-effect expressions to make sure they don't get reordered. But, i wonder if it is an ove

Re: Machine description question

2009-02-09 Thread Jean Christophe Beyler
Ok, I understand now. Thank you very much for your explanations, Jean Christophe Beyler On Sat, Feb 7, 2009 at 5:13 PM, Michael Meissner wrote: > On Sat, Feb 07, 2009 at 03:54:51PM -0500, Jean Christophe Beyler wrote: >> Dear all, >> >> I have a question about the way the machine description wor

Re: Machine description question

2009-02-07 Thread Michael Meissner
On Sat, Feb 07, 2009 at 03:54:51PM -0500, Jean Christophe Beyler wrote: > Dear all, > > I have a question about the way the machine description works and how > it affects the different passes of the compiler. I was reading the GNU > Compiler Collection Internals and I found this part (in section >

Machine description question

2009-02-07 Thread Jean Christophe Beyler
Dear all, I have a question about the way the machine description works and how it affects the different passes of the compiler. I was reading the GNU Compiler Collection Internals and I found this part (in section 14.8.1): (define_insn "" [(set (match_operand:SI 0 "general_operand" "