On 03/09/2016 08:45 AM, Woon yung Liu wrote:
3. due to the current register size (UNITS_PER_WORD) definition, allocating
a TI mode register will cause two consecutive registers to be allocated instead
(like the HILO pseudo register) of one (other than just being wrong, it is
probably wasteful).
On 02/27/2016 01:38 AM, Woon yung Liu wrote:
I've given up on trying to implement MMI support for this target because I
couldn't get the larger-than-normal GPR sizes to work nicely with the GCC
internals (registers sometimes get split due to the defined word size, or the
stuff in expr.c will jus
Jeff Law writes:
> On 01/19/2016 04:59 AM, Woon yung Liu wrote:
> >
> > In my current attempt at adding support for the TI mode, the MMI
> > definitions are added into a MD file for the R5900 and some functions
> > (i.e. mips_output_move) were modified to allow certain moves for the
> > TI mode of
On 19/01/16 14:42, Jeff Law wrote:
> On 01/19/2016 04:59 AM, Woon yung Liu wrote:
>>
>> In my current attempt at adding support for the TI mode, the MMI
>> definitions are added into a MD file for the R5900 and some functions
>> (i.e. mips_output_move) were modified to allow certain moves for the
>
On 01/19/2016 04:59 AM, Woon yung Liu wrote:
In my current attempt at adding support for the TI mode, the MMI
definitions are added into a MD file for the R5900 and some functions
(i.e. mips_output_move) were modified to allow certain moves for the
TI mode of the R5900 target. However, while it
