On Fri, 2020-06-26 at 01:24 +, Alan Lehotsky wrote:
> > On Jun 25, 2020, at 6:37 PM, Jeff Law wrote:
> >
> > On Thu, 2020-06-25 at 15:46 -0400, Alan Lehotsky wrote:
> > > I’m working on a GCC 8.3 port to a load/store architecture with a 32-bit
> > > data-path between registers and memory;
On June 26, 2020 3:24:24 AM GMT+02:00, Alan Lehotsky wrote:
>On Jun 25, 2020, at 6:37 PM, Jeff Law
>mailto:l...@redhat.com>> wrote:
>
>On Thu, 2020-06-25 at 15:46 -0400, Alan Lehotsky wrote:
>I’m working on a GCC 8.3 port to a load/store architecture with a
>32-bit data-path between registers and
On Jun 25, 2020, at 6:37 PM, Jeff Law mailto:l...@redhat.com>>
wrote:
On Thu, 2020-06-25 at 15:46 -0400, Alan Lehotsky wrote:
I’m working on a GCC 8.3 port to a load/store architecture with a 32-bit
data-path between registers and memory;
looking at the gcc.dg/loop-9.c test, I fail to pass beca
On Thu, 2020-06-25 at 15:46 -0400, Alan Lehotsky wrote:
> I’m working on a GCC 8.3 port to a load/store architecture with a 32-bit
> data-path between registers and memory;
>
> looking at the gcc.dg/loop-9.c test, I fail to pass because I have split the
> move of a double constant to memory in
I’m working on a GCC 8.3 port to a load/store architecture with a 32-bit
data-path between registers and memory;
looking at the gcc.dg/loop-9.c test, I fail to pass because I have split the
move of a double constant to memory into multiple moves (4 in fact, because I
only have a 16-bit immedi