On 01/18/2017 12:31 PM, Steve Silva wrote:
Hi All,
I just wanted to thank you for your help; I was able to fix the problem with
the following RTL
(define_expand "addhi3"
[(set (match_operand:HI 0 "nonimmediate_operand")
(plus:HI (match_operand:HI 1 "nonimmediate_operand")
(match_operand:HI 2
Hi All,
I just wanted to thank you for your help; I was able to fix the problem with
the following RTL
(define_expand "addhi3"
[(set (match_operand:HI 0 "nonimmediate_operand")
(plus:HI (match_operand:HI 1 "nonimmediate_operand")
(match_operand:HI 2 "general_operand")))]
""
{
if((GET_CODE
On 17.01.2017 21:41, Steve Silva via gcc wrote:
Hi Nathan,
Thanks for your advice. I retooled the addhi3 sequence to look like this:
(define_expand "addhi3"
[(set (match_operand:HI 0 "snap_mem_or_reg""+a,m")
(plus:HI (match_operand:HI 1 "snap_mem_or_reg" "%0,0")
(match_operand:HI 2 "genera
On 01/17/2017 03:41 PM, Steve Silva wrote:
Hi Nathan,
Thanks for your advice. I retooled the addhi3 sequence to look like this:
The md.texi file seems to have exactly the example you need:
Here for example, is how the 68000 halfword-add
instruction is defined:
@smallexample
(define_insn "
Hi Nathan,
Thanks for your advice. I retooled the addhi3 sequence to look like this:
(define_expand "addhi3"
[(set (match_operand:HI 0 "snap_mem_or_reg""+a,m")
(plus:HI (match_operand:HI 1 "snap_mem_or_reg" "%0,0")
(match_operand:HI 2 "general_operand" "aim,aim")))]
""
""
)
(define
On 01/17/2017 12:19 PM, Steve Silva via gcc wrote:
Hi All,
I am porting gcc for an internal processor and I am having some issues with
math instructions. Our processor uses two operands for math instructions which
are usually of the form OP0 = OP0 + OP1. The RTL pattern (for addm3) in gcc
Hi All,
I am porting gcc for an internal processor and I am having some issues with
math instructions. Our processor uses two operands for math instructions which
are usually of the form OP0 = OP0 + OP1. The RTL pattern (for addm3) in gcc
uses the form OP0 = OP1 + OP2. I understand that gcc
