On 14/10/11 17:40, Ben Gamari wrote:
> According to the ELF for ARM specification, this case requires the
> generation of veneer code to handle the instruction set switch. My
> question is where can one reliably place this veneer such that it is
> within the 2^11 window permitted by the relevant in
Recently I've been taking a foray into the ARM ABI to port the Glasgow
Haskell Compiler's internal linker to ARM. One question I've run into is
how to handle the case of interworking with R_ARM_JUMP24. This
particular relocation could be generated often by GHC as a result of
tail call optimization.
