Ok, thanks for the clarification jakub.
Umesg
On Mon, May 7, 2018, 2:08 PM Jakub Jelinek wrote:
> On Mon, May 07, 2018 at 01:58:48PM +0530, Umesh Kalappa wrote:
> > CCed Jakub,
>
> > > Agree that float division don't touch memory ,but fdiv result (stack
> > > register ) is stored back to a me
On Mon, May 07, 2018 at 01:58:48PM +0530, Umesh Kalappa wrote:
> CCed Jakub,
> > Agree that float division don't touch memory ,but fdiv result (stack
> > register ) is stored back to a memory i.e fResult .
That doesn't really matter. It is stored to a stack spill slot, something
that doesn't h
CCed Jakub,
> Hi Alex,
> Agree that float division don't touch memory ,but fdiv result (stack
> register ) is stored back to a memory i.e fResult .
>
> So compiler barrier in the inline asm i.e ::memory should prevent the
> shrinkage of instructions like "fstps fResult(%rip)"behind the
Hi Alex ,
Agree that float division don't touch memory ,but fdiv result (stack
register ) is stored back to a memory i.e fResult .
So compiler barrier in the inline asm i.e ::memory should prevent the
shrinkage of instructions like "fstps fResult(%rip)"behind the
fence ?
BTW ,if we mak
On Fri, Apr 13, 2018 at 01:34:21PM +, Vivek Kinhekar wrote:
> Hello Alexander,
>
> In the given testcase, the generated fdivrs instruction performs the
> division of a symbol ref (memory value) by FPU Stack Register and stores
> the value in FPU Stack Register.
The stack registers are not mem
Oh! Thanks for the quick response, Jakub.
Regards,
Vivek Kinhekar
-Original Message-
From: Jakub Jelinek
Sent: Friday, April 13, 2018 7:08 PM
To: Vivek Kinhekar
Cc: Alexander Monakov ; gcc@gcc.gnu.org
Subject: Re: GCC Compiler Optimization ignores or mistreats MFENCE memory
barrier
18 5:58 PM
To: Vivek Kinhekar
Cc: gcc@gcc.gnu.org
Subject: Re: GCC Compiler Optimization ignores or mistreats MFENCE memory
barrier related instruction
On Fri, 13 Apr 2018, Vivek Kinhekar wrote:
> The mfence instruction with memory clobber asm instruction should
> create a barrier betw
Thanks for the quick response, Alexander!
Regards,
Vivek Kinhekar
+91-7709046470
-Original Message-
From: Alexander Monakov
Sent: Friday, April 13, 2018 5:58 PM
To: Vivek Kinhekar
Cc: gcc@gcc.gnu.org
Subject: Re: GCC Compiler Optimization ignores or mistreats MFENCE memory
barrier
On Fri, 13 Apr 2018, Vivek Kinhekar wrote:
> The mfence instruction with memory clobber asm instruction should create a
> barrier between division and printf instructions.
No, floating-point division does not touch memory, so the asm does not (and
need not) restrict its motion.
Alexander
Hi,
We are trying to create a memory barrier with following testcase.
=
#include
void Test()
{
float fDivident = 0.1f;
float fResult = 0.0f;
fResult = ( fDivident / fResult );
__asm volatile ("mfence" ::: "memory");
printf("\nResult: %f\n", fResul
10 matches
Mail list logo
