Bingfeng Mei wrote:
However, if I also want to model the resource for writing back register
file, the number of states and arcs just explodes. It is especially true
for long pipeline instruction.
The usual solution is to have two DFAs, one used for most instructions,
and one used just for the
Sent: 14 March 2008 10:58
To: Bingfeng Mei
Subject: Re: DFA state and arc explosion
Hello,
I maybe totally wrong, but how it is possible that your NDFA DFA and
Minimal DFA are the same? I would think that this indicate some sort
of error.
Jan
2008/3/14, Bingfeng Mei <[EMAIL PROTECTED]>:
>
Hello,
In porting GCC (still 4.2) to our VLIW processor, I tried to model
pipeline as precisely as possible. If I only model the issue slot
resource, it is fine. GCC generates a small state machine and compiles
code quickly.
However, if I also want to model the resource for writing back register
