Re: Abt RTL expression - combining instruction

2006-11-10 Thread Ian Lance Taylor
"Rohit Arul Raj" <[EMAIL PROTECTED]> writes: > 1. Does attribute length affect the calculation of offset? It does if you tell it to. The "length" attribute must be managed entirely by your backend. Most backends with variable size branches use the length attribute to select which branch insn to

Re: Abt RTL expression - combining instruction

2006-11-10 Thread Rohit Arul Raj
Hi all, Finally got the combined compare_and_branch instruction to work. But it has some side effects while testing other files. 20010129-1.s: Assembler messages: 20010129-1.s:46: Error: Value of 0x88 too large for 7-bit relative instruction offset I just designed my compare and branch insn as

Re: Abt RTL expression - combining instruction

2006-11-08 Thread Ian Lance Taylor
"Rohit Arul Raj" <[EMAIL PROTECTED]> writes: > I have used cbranchmode4 instruction to generate combined compare and > branch instruction. > > (define_insn "cbranchmode4" > (set (pc) (if_then_else > (match_operator:CC 0 "comparison_operator" > [ (match_operand:SI 1

Re: Abt RTL expression - combining instruction

2006-11-08 Thread Rohit Arul Raj
Hi all, I have used cbranchmode4 instruction to generate combined compare and branch instruction. (define_insn "cbranchmode4" (set (pc) (if_then_else (match_operator:CC 0 "comparison_operator" [ (match_operand:SI 1 "register_operand" "r,r") (match_o

Re: Abt RTL expression - combining instruction

2006-11-06 Thread Ian Lance Taylor
"Rohit Arul Raj" <[EMAIL PROTECTED]> writes: > I am trying to combine the compare and branch instruction. But my > instructions are not getting generated as my operands are not matched > properly. > > Previously for individual compare instructions, i had > operand 0 - Register operand > operand 1

Abt RTL expression - combining instruction

2006-11-06 Thread Rohit Arul Raj
Hi all, I am trying to combine the compare and branch instruction. But my instructions are not getting generated as my operands are not matched properly. Previously for individual compare instructions, i had operand 0 - Register operand operand 1 - Non memory operand. For branch instruction, op