> When the offsets stored in the instructions are used, they refer to
> offsets from the address of the instruction (IA) plus 8 bytes. Are the
> pool_ranges also calculated from IA+8, from the address of the
> instruction itself or even from the address of the following
> instruction (IA+4)?
>
> In
Hi!
I'd appreciate help with my learner's questions about GCC machine
descriptions, about the ARM code generator.
I'm trying to fix code generation for the Cirrus MaverickCrunch FPU
by trying to understand several sets of patches, figure out which are
bogus which are buggy and which need reim
