> RTEMS has BSPs for a couple of simulators that
> do not have a source for clock tick interrupts.
> We simulate the passage of time by having a special
> IDLE task advance time. This works well enough
> when all tasks block but if a test depends on
> something like timeslice expiration, that won'
On Thu, 2008-09-25 at 14:49 -0500, Joel Sherrill wrote:
> Well I guess running the ACATS gives a big hint. There were not many
> failures on sh-rtems4.10 and some of those were illegal memory accesses.
> So only the c4* and cxa* are likely to be related to not having a real
> clock tick.
The c4 f
Well I guess running the ACATS gives a big hint. There were not many
failures on sh-rtems4.10 and some of those were illegal memory accesses.
So only the c4* and cxa* are likely to be related to not having a real
clock tick.
sh-rtems4.10-gcc (GCC) 4.4.0 20080918 (experimental) [trunk revision 14
Hi,
RTEMS has BSPs for a couple of simulators that
do not have a source for clock tick interrupts.
We simulate the passage of time by having a special
IDLE task advance time. This works well enough
when all tasks block but if a test depends on
something like timeslice expiration, that won't
happ
