> --- ORIG/trunk/gcc/config/sh/sh.h 2007-12-07 09:11:38.0 +0900
> +++ LOCAL/trunk/gcc/config/sh/sh.h2008-02-25 19:09:48.0 +0900
> @@ -553,7 +553,7 @@ do {
> \
> {
"Naveen H.S." <[EMAIL PROTECTED]> wrote:
> Yes, we completely agree that using the option "-mdalign" would solve
> the "address error" problem in the present testcase. We had tried the
> similar way to solve the problem. However, we observed that "-mdlaign"
> option would not guarantee the stack va
Hi,
>> Although one can explicitly provide his own fpscr setting as
>> Christian said and can use appropriate options, defaulting -mdalign
>. for TARGET_SH2A_DOUBLE might be more robust for users.
Yes, we completely agree that using the option "-mdalign" would solve
the "address error" problem i
"Naveen H.S." <[EMAIL PROTECTED]> wrote:
> Yes, we got this error on SH72513(SH2A) hardware. When the same code
> is run on simulator, the "address error" occurs on encountering the
> "fmov.d" instruction.
[snip]
> It is mentioned that "Double longword data accessed from other than
> double longwo
Hello,
Looks like you are mixing ABIs. what is you fpscr setting ?
From my understanding, if the fpscr PR bit is set to 0 the 64-bit
operation behaves as 2 32 bit operations (paired single precision). so I
don't think you get an address error here.
The well defined behavior of the fmov instr
Hi,
>> Have you got this error on the real SH2A-FPU hardware?
Yes, we got this error on SH72513(SH2A) hardware. When the same code
is run on simulator, the "address error" occurs on encountering the
"fmov.d" instruction.
>> couldn't find any description for 8-byte alignment restriction for
>> dou
"Naveen H.S." <[EMAIL PROTECTED]> wrote:
> The option "-mfmovd" is enabled by default for SH2A which generates
> "fmov.d" instruction by default. However, SH4 and SH4A targets
> generates "fmov.d" instruction only after passing the option "-mfmovd".
fmov.d has a byte order problem in little endia
Naveen H.S. wrote:
> SH2A, SH4 and SH4A FPU targets support mode switching i.e. switching
> between single precision and double precision. Double-precision FPU
> is also available for the above mentioned targets.
>
> The option "-mfmovd" is enabled by default for SH2A which generates
> "fmov.d"
Hi,
SH2A, SH4 and SH4A FPU targets support mode switching i.e. switching
between single precision and double precision. Double-precision FPU
is also available for the above mentioned targets.
The option "-mfmovd" is enabled by default for SH2A which generates
"fmov.d" instruction by default. Ho
