I meant to start the big assembly comparison run today, but I was busy
and tomorrow I have to leave. So I'll create the branch before doing
that but after finishing building newlibs.
There were no other target-independent change to make.
I fixed the Blackfin regressions.
I also fixed a few mini
I've finished the first round of testing on all targets and will be
sending patches soon.
Overall, I think the results are quite satisfying.
For the current bunch of files, I get the same code on the following
targets:
m32c crx mmix xstormy16 fr30 v850 m32r iq2000 picochip mcore spu ia64
m68
> Besides obvious register allocation differences
m32c is very sensitive to register allocation issues.
> you basically duplicate the cmp patterns into cbranch and
m32c already has a cbranch, though. It gets split after reload.
Also, m32c needs a separate compare RTL insn in the end
because i
I now went through all backends except sh and made the required changes.
So far all I tested is that gcc compiles with one target per port. :-)
Plus, i386-linux bootstraps and regtests okay.
Right now I aim at 100% identical assembly, maybe I'll have to relax
that. Besides obvious register allo
